summaryrefslogtreecommitdiff
path: root/src/cpu/intel/socket_mPGA479M
AgeCommit message (Expand)Author
2016-06-21intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki
2015-09-04x86: remove cpu_incs as romstage Make variableAaron Durbin
2015-05-04cpu: get rid of socket source codeStefan Reinauer
2014-12-30intel CAR: Fix DCACHE_RAM_BASE for old socketsKyösti Mälkki
2014-07-05Drop redundant select CACHE_AS_RAMKyösti Mälkki
2012-10-07Remove chip.h files without config structureKyösti Mälkki
2012-08-22Auto-declare chip_operationsKyösti Mälkki
2010-12-08Move "select CACHE_AS_RAM" lines from boards into CPU socket.Uwe Hermann
2010-09-30Rename build system variables to be more intuitive, andPatrick Georgi
2010-08-30mPGA479M Sockets can take Intel Mobile Celeron.Andreas Schultz
2010-04-11The ADL855PC was never confirmed working (in fact it's pretty sure that codeStefan Reinauer
2010-02-07newconfig is no more.Patrick Georgi
2009-10-17Remove some more instances of including previous empty x86/fpu/Makefile.incPeter Stuge
2009-10-16Drop empty cpu/x86/{mmx,sse}/{Config.lb,Makefile.inc} and remove referencesPeter Stuge
2009-10-09Remove default n statements to simplify .config and ldoptions files.Myles Watson
2009-10-08Set MMX and SSE where needed. Note that many boards don't even botherRonald G. Minnich
2009-09-29More consistent use of "default n" and "select XYZ" inPatrick Georgi
2009-09-25some progress on kconfig:Patrick Georgi
2006-11-05Use the canonical name of the vendors/devices and theUwe Hermann
2004-11-10adl855pc supportRonald G. Minnich
2004-11-04- Update abuild.sh so it will rebuild successfull buildsEric Biederman
2004-10-27- Bug fixes to the P-III supportEric Biederman
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-09 20:05:10 +0000