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path: root/src/cpu/intel
AgeCommit message (Expand)Author
2021-02-11cpu/intel/microcode: Fix typo in function parameterElyes HAOUAS
2021-02-02treewide [Kconfig]: Remove useless commentElyes HAOUAS
2021-02-01sb/intel/i82801gx,ix: Drop MPEN from GNVSKyösti Mälkki
2021-02-01cpu/intel/microcode: Reuse existing function to read MCU revisionArthur Heymans
2021-02-01soc/intel/*: Get rid of custom microcode cachingPatrick Rudolph
2021-01-28cpu/intel/socket_LGA775: Align CAR DCACHE_RAM_BASE to SIZEArthur Heymans
2021-01-28cpu/intel/microcode: Add caching layer in intel_microcode_findPatrick Rudolph
2021-01-28cpu/intel/common/fsb.c: Correct code styleFrans Hendriks
2021-01-28arch/x86: Remove most C_ENV_BOOTBLOCK_SIZE limitsKyösti Mälkki
2021-01-26cpu/intel/common/fsb.c: Add Broadwell CPUID modelsAngel Pons
2021-01-24cpu/intel/model_2065x: Drop configurable TDP copy-pastaAngel Pons
2021-01-24cpu/intel/model_2065x: Drop unused c-state codeAngel Pons
2021-01-24soc/intel/broadwell: Move romstage.c to HaswellAngel Pons
2021-01-24soc/intel/broadwell: Use Haswell CPU headersAngel Pons
2021-01-24cpu/intel/haswell: Add Broadwell CPUIDs and microcodeAngel Pons
2021-01-24cpu/intel/haswell: Set C9/C10 vccminAngel Pons
2021-01-24cpu/intel/haswell: Add fast ramp voltage for BroadwellAngel Pons
2021-01-22cpu/intel/haswell: Enable timed MWAIT if supportedAngel Pons
2021-01-21cpu/intel/haswell: Clean up CPUID definitionsAngel Pons
2021-01-21cpu/intel/haswell: Add s0ix supportAngel Pons
2021-01-21cpu/intel/socket_LGA775: Increase DCACHE_RAM_SIZEElyes HAOUAS
2021-01-18cpu/intel/smm/gen1/smmrelocate.c: Remove repeated wordElyes HAOUAS
2021-01-15build system: Always add coreboot.pre dependency to intermediatesPatrick Georgi
2021-01-15cpu/intel/haswell/acpi.c: Use C-state enum definitionsAngel Pons
2021-01-15cpu/intel/haswell: Factor out ACPI C-state valuesAngel Pons
2021-01-15cpu/intel/*init: Remove obsolete cache enablePatrick Rudolph
2021-01-15cpu/x86/mpinit: Serialize microcode updates for HT threadsPatrick Rudolph
2021-01-14build system: Structure and serialize INTERMEDIATEPatrick Georgi
2021-01-11cpu/intel/haswell: Add delay for TPM before Flex Ratio rebootAngel Pons
2021-01-11cpu/intel/haswell: Allow tuning VR for C-state operationsAngel Pons
2021-01-11cpu/intel/haswell: Raise PSI1 threshold to 20AAngel Pons
2021-01-11cpu/intel/haswell: Enable turbo ratio if availableAngel Pons
2021-01-11cpu/intel/haswell: Do not set PMG_IO_CAPTURE_BASE MSRAngel Pons
2021-01-10cpu/intel/haswell/haswell.h: Align with BroadwellAngel Pons
2021-01-10cpu/intel/haswell: Align cosmetics with BroadwellAngel Pons
2021-01-10cpu/intel/haswell: Do not determine CPU type at runtimeAngel Pons
2021-01-08cpu/intel/model_206ax: Always return a package from _CSTAngel Pons
2021-01-08*/Makefile.inc: Add some INTERMEDIATE targets to .PHONYArthur Heymans
2021-01-07arch/x86: Move prologue to .init sectionKyösti Mälkki
2021-01-07cpu/intel/haswell: Rename `HASWELL_BCLK` to `CPU_BCLK`Angel Pons
2021-01-06cpu/intel/model_206ax: Simplify C-state acpigenAngel Pons
2021-01-06cpu/intel/model_206ax: Rename `cX_acpower` optionsAngel Pons
2021-01-06cpu/intel/model_206ax: Unify ACPI C-state optionsAngel Pons
2021-01-06cpu/intel/x/chip.h: Drop unused `disable_acpi` settingAngel Pons
2020-12-25cpu/intel/model_206ax: Add more CPU steppingsAngel Pons
2020-12-25nb/intel/sandybridge: Move steppings to CPU headerAngel Pons
2020-12-14arch/x86: Combine bootblock linker scriptsKyösti Mälkki
2020-12-12nb/intel/sandybridge: Clean up stepping logicAngel Pons
2020-12-11Drop many cases of .previous directive useKyösti Mälkki
2020-12-02cbfs: Simplify load/map API names, remove type argumentsJulius Werner