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Some coreboot project code with my work
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intel
Age
Commit message (
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Author
2012-07-26
Drop CONFIG_CPU_MODEL_NAME and fix CPU name displayed in logs
Stefan Reinauer
2012-07-26
Enable Microcode in CBFS for all SandyBridge/IvyBridge systems
Stefan Reinauer
2012-07-25
Fix comment to reference IvyBridge, too
Stefan Reinauer
2012-07-25
Include SandyBridge Microcode when IvyBridge is enabled
Stefan Reinauer
2012-07-25
Fix date output in Microcode update
Stefan Reinauer
2012-07-24
CPU: Set flex ratio to nominal TDP ratio in bootblock
Duncan Laurie
2012-07-24
CPU: Update ivybridge PP1 current limit value
Duncan Laurie
2012-07-24
CPU: Add basic support for Nominal Configurable TDP
Duncan Laurie
2012-07-24
Config changes to support microcode in CBFS
Vadim Bendebury
2012-07-24
Add microcode blob processing
Vadim Bendebury
2012-07-24
Add code to read Intel microcode from CBFS
Vadim Bendebury
2012-07-24
Rename microcode include file to be model agnostic
Vadim Bendebury
2012-07-24
Properly identify ACPI C3 states in _CST table.
Duncan Laurie
2012-07-24
Remove code that enables/disables VMX in coreboot on chromebooks.
Ronald G. Minnich
2012-07-04
Intel cpus: Extend cache to cover complete Flash Device
Kyösti Mälkki
2012-07-04
Intel model_106cx: change CAR to model_6ex
Kyösti Mälkki
2012-07-04
Intel cpus: delete dead CAR code and whitespace fixes
Kyösti Mälkki
2012-07-04
Intel cpus: use CPU_ADDR_BITS from Kconfig during CAR
Kyösti Mälkki
2012-07-02
remove CONFIG_SERIAL_CPU_INIT
Sven Schnelle
2012-07-02
Use broadcast SIPI to startup siblings
Sven Schnelle
2012-07-02
Intel CPUs: execute microcode update only once per core
Kyösti Mälkki
2012-06-19
Enable Intel PECI on Model 6fx CPUs
Sven Schnelle
2012-05-29
Drop config variable CPU_MODEL_INDEX
Stefan Reinauer
2012-05-08
Clean up #ifs
Patrick Georgi
2012-05-03
Fix register corruption during Intel Microcode update
Stefan Reinauer
2012-05-02
Don't include console.h in microcode.c when compiling with ROMCC
Stefan Reinauer
2012-04-30
Fix up Sandybridge C state generation code
Stefan Reinauer
2012-04-30
Rework ACPI CST table generation
Stefan Reinauer
2012-04-26
microcode: print date of microcode and unify output
Stefan Reinauer
2012-04-26
Revamp Intel microcode update code
Stefan Reinauer
2012-04-25
Replace cache control magic numbers with symbols
Patrick Georgi
2012-04-06
Fix support for RAM-less multi-processor init
Kyösti Mälkki
2012-04-05
Add support for Intel Sandybridge CPU
Stefan Reinauer
2012-04-03
Add support for Intel Turbo Boost feature
Stefan Reinauer
2012-04-02
Apply cache-as-ram conditionally on socket mPGA604
Kyösti Mälkki
2012-03-31
Whitespace fixes
Patrick Georgi
2012-03-31
Intel cpus: get MAXPHYADDR at runtime for new CAR
Kyösti Mälkki
2012-03-31
Intel cpus: add hyper-threading CPU support to new CAR
Kyösti Mälkki
2012-03-31
Intel cpus: improve CPU compatibility of new CAR
Kyösti Mälkki
2012-03-31
Intel cpus: apply some good programming practices in new CAR
Kyösti Mälkki
2012-03-31
Intel cpus: cache actual size of the Flash ROM device
Kyösti Mälkki
2012-03-31
Intel cpus: copy model_6ex CAR code
Kyösti Mälkki
2012-03-25
Intel cpus: Fix deadlock on hyper-threading init
Kyösti Mälkki
2012-03-17
Intel cpus: Include CAR from socket
Kyösti Mälkki
2012-02-16
Intel cpus: use CPU_PHYSMASK_HI define in CAR
Kyösti Mälkki
2012-02-15
Intel model_106cx: Use symbolic names for MTRR bits
Kyösti Mälkki
2012-02-10
Intel cpus: apply un-written naming rules
Kyösti Mälkki
2012-02-09
Add Intel Socket LGA771
Sven Schnelle
2012-01-10
MTRR: get physical address size from CPUID
Sven Schnelle
2012-01-09
ACPI: mark empty get_cst_entries() weak
Sven Schnelle
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