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path: root/src/cpu/intel
AgeCommit message (Expand)Author
2013-03-22haswell: Add microcode for ULT C0 stepping 0x40651Duncan Laurie
2013-03-22haswell: vboot path support in romstageAaron Durbin
2013-03-22haswell: use dynamic cbmemAaron Durbin
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer
2013-03-21Intel: Update CPU microcode for 6fx CPUsStefan Reinauer
2013-03-21Intel: Update CPU microcode for 106cx CPUsStefan Reinauer
2013-03-21Intel: Update CPU microcode scriptStefan Reinauer
2013-03-21lynxpoint: Add helper functions for reading PM and GPIO baseDuncan Laurie
2013-03-21haswell: RESET_ON_INVALID_RAMSTAGE_CACHE optionAaron Durbin
2013-03-21haswell: implement ramstage caching in SMM regionAaron Durbin
2013-03-21haswell: add multipurpose SMM memory regionAaron Durbin
2013-03-21haswell: set TSEG as WB cacheable in romstageAaron Durbin
2013-03-21haswell: support for parallel SMM relocationAaron Durbin
2013-03-21haswell: use s3_resume field in romstage_handoffAaron Durbin
2013-03-21x86: protect against abi assumptions from compilerAaron Durbin
2013-03-21haswell: support for CONFIG_RELOCATABLE_RAMSTAGEAaron Durbin
2013-03-21ramstage: prepare for relocationAaron Durbin
2013-03-20Intel: Update CPU microcode for Sandybridge/Ivybridge CPUsStefan Reinauer
2013-03-20Intel: Update CPU microcode for 1067x CPUsStefan Reinauer
2013-03-19haswell: wait 10ms after INIT IPIAaron Durbin
2013-03-19haswell: Parallel AP bringupAaron Durbin
2013-03-19intel microcode: split up microcode loading stagesAaron Durbin
2013-03-18haswell: add romstage_after_car() functionAaron Durbin
2013-03-18haswell: move call site of save_mrc_data()Aaron Durbin
2013-03-18haswell: romstage: pass stack pointer and MTRRsAaron Durbin
2013-03-18haswell: unify romstage logicAaron Durbin
2013-03-18haswell: adjust CAR usageAaron Durbin
2013-03-18haswell: enable caching before SMM initializationAaron Durbin
2013-03-18haswell: Clear correct number of MCA banksAaron Durbin
2013-03-18haswell: move definition of CORE_THREAD_COUNT_MSRAaron Durbin
2013-03-18haswell: Use SMM ModulesAaron Durbin
2013-03-17x86 intel: Add Firmware Interface Table supportAaron Durbin
2013-03-14haswell: Add ULT CPUID and updated microcodeDuncan Laurie
2013-03-14haswell: Properly Guard Engergy Policy by CPUIDAaron Durbin
2013-03-14haswell: Add initial support for Haswell platformsAaron Durbin
2013-03-07Fix socket LGA775Kyösti Mälkki
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2013-02-14sconfig: rename lapic_cluster -> cpu_clusterStefan Reinauer
2013-02-11Intel: Replace MSR 0xcd with MSR_FSB_FREQPatrick Georgi
2013-02-09speedstep: Deduplicate some MSR identifiersPatrick Georgi
2013-02-09document Intel VMX locking behaviorMike Frysinger
2013-01-30Extend CBFS to support arbitrary ROM source media.Hung-Te Lin
2012-11-27Get rid of drivers classPatrick Georgi
2012-11-13Add spinlock to serialize Intel microcode updatesStefan Reinauer
2012-11-13Fix CONFIG_MAX_CPU set to 1 CPU build problemStefan Reinauer
2012-11-12ivybridge: Catch unknown CPU revisionsStefan Reinauer
2012-11-12Initialize the VMX MSRMarc Jones
2012-11-12Revert "Remove code that enables/disables VMX in coreboot on chromebooks."Marc Jones
2012-11-12sandybridge: Correct reporting of cores and threadsStefan Reinauer
2012-11-07Leave power control registers unlockedSameer Nanda