summaryrefslogtreecommitdiff
path: root/src/cpu/intel
AgeCommit message (Expand)Author
2013-06-14usbdebug: Drop temporary disables of log outputKyösti Mälkki
2013-06-13Add support for Intel Nehalem CPUVladimir Serbinenko
2013-06-03haswell: allow for disabled hyperthreadingAaron Durbin
2013-05-24cpu/intel/haswell/Kconfig: Intend help text with two spacesPaul Menzel
2013-05-16haswell: enable cache-as-ram migrationAaron Durbin
2013-05-14x86: add thread supportAaron Durbin
2013-05-10Drop prototype guarding for romccStefan Reinauer
2013-05-08copy_and_run: drop boot_complete parameterStefan Reinauer
2013-05-07haswell: use asmlinkage for assembly-called funcsAaron Durbin
2013-05-07haswell: use tsc for udelay()Aaron Durbin
2013-05-01haswell: 24MHz monotonic time implementationAaron Durbin
2013-04-23Intel microcode: Return when `microcode_updates` is `NULL`Vladimir Serbinenko
2013-04-03haswell: enable ROM cachingAaron Durbin
2013-04-03haswell: keep ROM cache enabledAaron Durbin
2013-04-03haswell: use new interface to disable rom cachingAaron Durbin
2013-04-01lynxpoint: split clearing and enabling of smmAaron Durbin
2013-03-22haswell: Add microcode for ULT C0 stepping 0x40651Duncan Laurie
2013-03-22haswell: vboot path support in romstageAaron Durbin
2013-03-22haswell: use dynamic cbmemAaron Durbin
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer
2013-03-21Intel: Update CPU microcode for 6fx CPUsStefan Reinauer
2013-03-21Intel: Update CPU microcode for 106cx CPUsStefan Reinauer
2013-03-21Intel: Update CPU microcode scriptStefan Reinauer
2013-03-21lynxpoint: Add helper functions for reading PM and GPIO baseDuncan Laurie
2013-03-21haswell: RESET_ON_INVALID_RAMSTAGE_CACHE optionAaron Durbin
2013-03-21haswell: implement ramstage caching in SMM regionAaron Durbin
2013-03-21haswell: add multipurpose SMM memory regionAaron Durbin
2013-03-21haswell: set TSEG as WB cacheable in romstageAaron Durbin
2013-03-21haswell: support for parallel SMM relocationAaron Durbin
2013-03-21haswell: use s3_resume field in romstage_handoffAaron Durbin
2013-03-21x86: protect against abi assumptions from compilerAaron Durbin
2013-03-21haswell: support for CONFIG_RELOCATABLE_RAMSTAGEAaron Durbin
2013-03-21ramstage: prepare for relocationAaron Durbin
2013-03-20Intel: Update CPU microcode for Sandybridge/Ivybridge CPUsStefan Reinauer
2013-03-20Intel: Update CPU microcode for 1067x CPUsStefan Reinauer
2013-03-19haswell: wait 10ms after INIT IPIAaron Durbin
2013-03-19haswell: Parallel AP bringupAaron Durbin
2013-03-19intel microcode: split up microcode loading stagesAaron Durbin
2013-03-18haswell: add romstage_after_car() functionAaron Durbin
2013-03-18haswell: move call site of save_mrc_data()Aaron Durbin
2013-03-18haswell: romstage: pass stack pointer and MTRRsAaron Durbin
2013-03-18haswell: unify romstage logicAaron Durbin
2013-03-18haswell: adjust CAR usageAaron Durbin
2013-03-18haswell: enable caching before SMM initializationAaron Durbin
2013-03-18haswell: Clear correct number of MCA banksAaron Durbin
2013-03-18haswell: move definition of CORE_THREAD_COUNT_MSRAaron Durbin
2013-03-18haswell: Use SMM ModulesAaron Durbin
2013-03-17x86 intel: Add Firmware Interface Table supportAaron Durbin
2013-03-14haswell: Add ULT CPUID and updated microcodeDuncan Laurie
2013-03-14haswell: Properly Guard Engergy Policy by CPUIDAaron Durbin
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-09 10:26:30 +0000