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path: root/src/cpu/intel
AgeCommit message (Expand)Author
2020-11-03cpu/intel/haswell: Move smmrelocate.c MSR definitions to headerAngel Pons
2020-11-02cpu/intel/car/non-evict/cache_as_ram.S: Add support for longmodePatrick Rudolph
2020-10-31{cpu,nb}/intel/haswell: Drop unnecessary `UL` suffixAngel Pons
2020-10-31cpu/intel/common: correct MSR for the Nominal Performance in CPPCMichael Niewöhner
2020-10-30cpu/intel/Makefile.inc: Use correct Kconfig symbolsAngel Pons
2020-10-26cpu/intel/common: implement the two missing CPPC v2 autonomous registersMichael Niewöhner
2020-10-24cpu/intel/common: rework code previously moved to common cpu codeMichael Niewöhner
2020-10-24{cpu,soc}/intel: deduplicate cpu codeMichael Niewöhner
2020-10-23haswell/broadwell: Fix typos of `BCLK`Angel Pons
2020-10-21cpu/intel/common: Fix regressionPatrick Rudolph
2020-10-21{cpu,soc}/intel: replace AES-NI locking by common implemenation callMichael Niewöhner
2020-10-20cpu/intel/model_{2065x,206ax}: fix AES-NI lockingMichael Niewöhner
2020-10-19cpu/intel/common: add a Kconfig to control AES-NI lockingMichael Niewöhner
2020-10-19cpu/intel/common: only lock AES-NI when supportedMichael Niewöhner
2020-10-19cpu/intel/common: rework AES-NI lockingMichael Niewöhner
2020-10-19soc/intel/skl,cpu/intel: copy AES-NI locking to common cpu codeMichael Niewöhner
2020-10-17cpu/intel,soc/intel: drop Kconfig for hyperthreadingMichael Niewöhner
2020-10-16include/cpu/x86: introduce new helper for (un)setting MSRsMichael Niewöhner
2020-10-14haswell/lynxpoint: Align cosmetics with BroadwellAngel Pons
2020-10-02drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES configShelley Chen
2020-09-28cpu/intel/206ax/acpi.c: Fix get_cores_per_packageEvgeny Zinoviev
2020-09-27cpu/intel/haswell/smmrelocate.c: Spell `CPU` in uppercaseAngel Pons
2020-09-27cpu/intel/haswell/haswell_init.c: Align printk's with BroadwellAngel Pons
2020-09-26arch/x86: Introduce `ARCH_ALL_STAGES_X86_32`Angel Pons
2020-09-21src/cpu: Drop unneeded empty linesElyes HAOUAS
2020-09-12cpu/intel/model_1067x: enable PECIMichael Büchler
2020-08-30cpu/intel/haswell: Set LT_LOCK_MEMORY MSR on finalize stepAngel Pons
2020-08-21cpu/intel/haswell: Select HAVE_ASAN_IN_ROMSTAGEHarshit Sharma
2020-08-18cpu/intel/common: Use macro for access_sizeElyes HAOUAS
2020-08-17cpu/intel/model_6fx: Include Conroe-L microcodeArthur Heymans
2020-08-11cpu/intel: Remove Core 2 Duo E8200 CPUID from model_6fxAngel Pons
2020-08-06cpu/intel/common: Add `intel_ht_supported` functionAngel Pons
2020-08-03cpu/intel/haswell: add Crystal Well CPU IDsIru Cai
2020-08-03cpu/intel/common/fsb.c: add Crystal Well supportIru Cai
2020-07-26cpu/intel/car/romstage.c: Remove unused <bootblock_common.h>Elyes HAOUAS
2020-07-26src: Change BOOL CONFIG_ to CONFIG() in comments & stringsMartin Roth
2020-07-26cpu,soc/intel: Drop select SMPKyösti Mälkki
2020-07-26cpu/intel/model_206ax: Clean up includesElyes HAOUAS
2020-07-26src: Remove unused 'include <cpu/intel/common/common.h>Elyes HAOUAS
2020-07-14cpu/intel/model_1067x: Drop <cpu/x86/mp.h> includeElyes HAOUAS
2020-07-14src: Remove unused 'include <cpu/x86/msr.h>'Elyes HAOUAS
2020-07-14src: Remove unused 'include <types.h>'Elyes HAOUAS
2020-07-10cpu/intel/haswell/finalize.c: Drop dead codeAngel Pons
2020-07-09cpu/intel/model_2065x/model_2065x_init.c: Drop dead codeAngel Pons
2020-07-09cpu/intel/model_206ax/finalize.c: Drop dead codeAngel Pons
2020-07-08haswell: relocate `romstage_common` to northbridgeAngel Pons
2020-07-08nb/intel/haswell: Drop unnecessary variableAngel Pons
2020-07-08haswell: drop unused function parameterAngel Pons
2020-06-22cpu/x86/lapic: Support x86_64 and clean up codePatrick Rudolph
2020-06-16sb,soc/intel: Replace smm_southbridge_enable_smi()Kyösti Mälkki
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