coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2017-06-16	haswell: add CBMEM_MEMINFO table when initing RAM	Matt DeVillier
2017-06-09	cpu/intel/model_206ax: Use tsc monotonic timer	Patrick Rudolph
2017-06-07	Use more secure HTTPS URLs for coreboot sites	Paul Menzel
2017-05-16	cpu/intel/turbo: Add option to disable turbo	Subrata Banik
2017-03-16	cpu/intel: Fix the remaining issues detected by checkpatch	Lee Leahy
2017-03-16	cpu/intel: Wrap lines at 80 columns	Lee Leahy
2017-03-16	cpu/intel: Fix brace issues detected by checkpatch.pl	Lee Leahy
2017-03-16	cpu/intel: Add int to unsigned	Lee Leahy
2017-03-16	cpu/intel: Fix the spacing issues	Lee Leahy
2017-03-16	cpu/intel: Indent with tabs	Lee Leahy
2017-03-09	cpu/intel/model_6{e,f}x: Unify init files	Paul Menzel
2017-02-22	src/cpu/intel: Add license headers to all files	Martin Roth
2017-01-10	cpu/intel/model_6fx: Add Conroe-L to cpu_device_id list	Arthur Heymans
2016-12-27	cpu/intel/common: Add/Use common function to set virtualization	Matt DeVillier
2016-12-18	intel cache-as-ram: Move DCACHE_RAM_BASE	Kyösti Mälkki
2016-12-11	intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup	Kyösti Mälkki
2016-12-10	cpu/intel/lga775: Do not select model_6ex CPU	Arthur Heymans
2016-12-09	intel/sandybridge: Use postcar_frame for MTRR setup	Kyösti Mälkki
2016-12-06	CPU: Declare cpu_phys_address_size() for all arch	Kyösti Mälkki
2016-12-01	romstage_handoff: remove code duplication	Aaron Durbin
2016-11-20	intel sandy/ivy: Increase XIP cache with USE_NATIVE_RAMINIT	Kyösti Mälkki
2016-11-20	intel car: Move pre-ram stack guard lower	Kyösti Mälkki
2016-11-18	intel/sandybridge post-car: Redo MTRR settings and stack selection	Kyösti Mälkki
2016-11-18	intel post-car: Increase stacktop alignment	Kyösti Mälkki
2016-11-11	intel cache-as-ram: Unify stack setup	Kyösti Mälkki
2016-11-11	intel post-car: Separate files for setup_stack_and_mtrrs()	Kyösti Mälkki
2016-11-11	intel/sandybridge: Use common ACPI S3 recovery	Kyösti Mälkki
2016-11-09	Move select UDELAY_LAPIC from nb/gm45/Kconfig to cpu/model_1067x/Kconfig	Arthur Heymans
2016-11-08	cpu/intel/socket_mPGA478MN: Add socket P	Arthur Heymans
2016-11-08	intel post-car: Split legacy sockets	Kyösti Mälkki
2016-10-31	lib/prog_loaders: use common ramstage_cache_invalid()	Aaron Durbin
2016-10-11	cpu/intel/smm: Use CONFIG_SMM_TSEG_SIZE	Nico Huber
2016-10-09	cpu/intel/model_6ex: Set msr bits for dynamic L2, C2E, C4E	Arthur Heymans
2016-09-08	Kconfig: Add option for microcode filenames	Martin Roth
2016-09-04	src/cpu: Improve code formatting	Elyes HAOUAS
2016-08-28	src/cpu: Add required space before opening parenthesis '('	Elyes HAOUAS
2016-08-28	src/cpu: Remove unnecessary whitespace before "\n"	Elyes HAOUAS
2016-08-23	src/cpu: Capitalize CPU, APIC and IOAPIC typo fix	Elyes HAOUAS
2016-08-01	Remove non-ascii & unprintable characters	Martin Roth
2016-07-31	src/cpu: Capitalize CPU	Elyes HAOUAS
2016-07-31	src/cpu: Capitalize ROM and RAM	Elyes HAOUAS
2016-07-26	intel car: Use MTRR WRPROT type for XIP cache	Kyösti Mälkki
2016-07-26	intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE	Kyösti Mälkki
2016-07-23	intel/haswell: Remove useless MTRR clear	Kyösti Mälkki
2016-07-23	intel/haswell post-car: Minor fix on MTRR setting	Kyösti Mälkki
2016-07-23	intel/haswell: Add asmlinkage for romstage_after_car()	Kyösti Mälkki
2016-07-22	intel car: Unify postcodes	Kyösti Mälkki
2016-07-22	intel car: Unify whitespace and comment fixes	Kyösti Mälkki
2016-07-22	intel car: Remove guard on XIP_ROM_SIZE	Kyösti Mälkki
2016-07-22	intel model_106cx: Include CAR from socket directory	Kyösti Mälkki