summaryrefslogtreecommitdiff
path: root/src/cpu/intel
AgeCommit message (Expand)Author
2015-01-03intel/model_206ax: update microcodeNicolas Reinecke
2014-12-30intel CAR: Fix DCACHE_RAM_BASE for old socketsKyösti Mälkki
2014-12-19intel/truxton: Add dummy cache-as-ram regionKyösti Mälkki
2014-12-16Intel FSP: Move to DYNAMIC_CBMEMKyösti Mälkki
2014-12-05FSP platform microcode: Update to remove Kconfig variableMartin Roth
2014-12-03i945: Consolidate acpi/platform.aslVladimir Serbinenko
2014-12-02Replace hlt with halt()Patrick Georgi
2014-11-30Replace hlt() loops with halt()Patrick Georgi
2014-11-19acpigen: Add and use acpigen_write_method.Vladimir Serbinenko
2014-11-15chromeos: provide stub functions for !CONFIG_VBOOT_VERIFY_FIRMWAREAaron Durbin
2014-11-09haswell: Move to implicit length patchingVladimir Serbinenko
2014-11-09ibexpeak, bd82x6x: Move to implicit length patchingVladimir Serbinenko
2014-11-08fsp_rangeley: Switch to per-device ACPIVladimir Serbinenko
2014-11-07cpu/intel/fsp_model_406dx: Invaild include pathEdward O'Callaghan
2014-10-29cpu/intel: Add configuration for socket LGA1155Damien Zammit
2014-10-27{arch,cpu,drivers,ec}: Don't hide pointers behind typedefsEdward O'Callaghan
2014-10-19x86 romstage: Move stack just below RAMTOPKyösti Mälkki
2014-10-19haswell baytrail: Enable RELOCATABLE_RAMSTAGEKyösti Mälkki
2014-10-16ACPI: Remove CONFIG_GENERATE_ACPI_TABLESVladimir Serbinenko
2014-09-12cpu/intel/fsp_model_206ax/model_206ax_init.c: Correct commentPaul Menzel
2014-08-30sandybridge: Add native sandybridgeVladimir Serbinenko
2014-08-18cpu/intel/fsp_model_406dx: code cleanupMartin Roth
2014-08-12cpu/intel/XXX/acpi.c: Fix coding style violationMartin Roth
2014-08-10model_106cx: don't blindly set Kconfig settingsAaron Durbin
2014-08-10cpu/intel/model_1067x: avoid null-pointer dereferencePatrick Georgi
2014-08-04cpu/intel: Fix out-of-bounds read due to off-by-one in conditionEdward O'Callaghan
2014-07-30model_206ax_init.c: Trivial - fix indentEdward O'Callaghan
2014-07-30cpu/intel: Add fsp version of model 406dx (Rangeley / Atom C2000)Martin Roth
2014-07-30cpu/intel/model_2065x/model_2065x_init.c: Remove dead codeEdward O'Callaghan
2014-07-29sandy/ivybridge: Native raminit.Vladimir Serbinenko
2014-07-23cpu/intel/fsp_model_206ax/model_206ax_init.c: Use macro `IS_ENABLED()`Paul Menzel
2014-07-19intel/model_2065x: Remove dead code.Vladimir Serbinenko
2014-07-17cpu,Makefile.inc: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-07-10intel/haswell: add vmx support w/Kconfig optionMatt DeVillier
2014-07-08cpu: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-07-05Drop redundant select CACHE_AS_RAMKyösti Mälkki
2014-07-05intel: Make monotonic timer a first class citizenEdward O'Callaghan
2014-06-17intel/model_2065x: Add 20652 microcode.Vladimir Serbinenko
2014-05-30cpu/intel/fsp_model_206ax: change realpath to readlinkMartin Roth
2014-05-17build: separate CPPFLAGS from CFLAGSPatrick Georgi
2014-05-17build: CPPFLAGS is more common than INCLUDESPatrick Georgi
2014-05-13cpu/intel: Add CPU socket rPGA988BZaolin
2014-05-10Replace SERIAL_CPU_INIT with PARALLEL_CPU_INITKyösti Mälkki
2014-05-09cougar_canyon2: Switch CPU/NB/SB to the shared FSP codeMartin Roth
2014-05-06Introduce stage-specific architecture for corebootFurquan Shaikh
2014-05-05haswell: move to mp_init libraryAaron Durbin
2014-05-03Move ARCH_* from board/Kconfig to cpu or soc Kconfig.Furquan Shaikh
2014-04-26Rename coreboot_ram stage to ramstageFurquan Shaikh
2014-04-26Get rid of HAVE_INIT_TIMER config optionFurquan Shaikh
2014-03-20rmodules: use rmodtool to create rmodulesAaron Durbin