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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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intel
Age
Commit message (
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Author
2014-05-09
cougar_canyon2: Switch CPU/NB/SB to the shared FSP code
Martin Roth
2014-05-06
Introduce stage-specific architecture for coreboot
Furquan Shaikh
2014-05-05
haswell: move to mp_init library
Aaron Durbin
2014-05-03
Move ARCH_* from board/Kconfig to cpu or soc Kconfig.
Furquan Shaikh
2014-04-26
Rename coreboot_ram stage to ramstage
Furquan Shaikh
2014-04-26
Get rid of HAVE_INIT_TIMER config option
Furquan Shaikh
2014-03-20
rmodules: use rmodtool to create rmodules
Aaron Durbin
2014-03-16
Make POST device configurable.
Idwer Vollering
2014-02-25
Remove CACHE_ROM.
Vladimir Serbinenko
2014-02-20
intel/model_2065x: Fix APICID generation.
Vladimir Serbinenko
2014-02-16
haswell: backup the default SMM region on resume
Aaron Durbin
2014-02-15
coreboot: infrastructure for different ramstage loaders
Aaron Durbin
2014-02-12
PCI: Drop includes under cpu
Kyösti Mälkki
2014-02-06
usbdebug: Drop obsolete code
Kyösti Mälkki
2014-02-01
cpu/intel/model_2065x: Add model 20652
Vladimir Serbinenko
2014-01-30
cpu/intel: allow non-packaged scoped turbo setting
Aaron Durbin
2014-01-30
coreboot: config to cache ramstage outside CBMEM
Aaron Durbin
2014-01-30
vboot: provide empty vboot_verify_firmware()
Aaron Durbin
2014-01-28
intel: fix microcode compilation failure in bootblock
Aaron Durbin
2014-01-26
src/cpu: Fix spelling of MTTR to MTRR
Paul Menzel
2014-01-23
intel/microcode: Remove leftover MICROCODE_INCLUDE_PATH.
Vladimir Serbinenko
2014-01-16
cpu/intel: Remove dummy terminators from microcode blobs
Alexandru Gagniuc
2014-01-16
cpu/intel: Make all Intel CPUs load microcode from CBFS
Alexandru Gagniuc
2014-01-15
nehalem/sandy/ivy/haswell: Enable WRPROT cache for all of flash
Kyösti Mälkki
2014-01-15
Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR
Kyösti Mälkki
2014-01-11
intel/fsp: Fix microcode including
Patrick Georgi
2013-12-21
haswell: Update microcode revision
Duncan Laurie
2013-12-17
cpu/intel: Do not rely on CBFS microcode having a terminator
Alexandru Gagniuc
2013-12-13
cpu: Rename CPU_MICROCODE_IN_CBFS to SUPPORT_CPU_UCODE_IN_CBFS
Alexandru Gagniuc
2013-12-12
haswell: Export functions for CPU family+model and stepping
Duncan Laurie
2013-12-12
haswell: Update ULT microcode to rev 14h
Duncan Laurie
2013-12-07
haswell: VR controller configuration
Aaron Durbin
2013-12-07
haswell: Misc power management setup and fixes
Duncan Laurie
2013-12-05
cpu: Remove BOARD_MICROCODE_CBFS_GENERATE Kconfig option
Alexandru Gagniuc
2013-12-04
Add the Intel FSP 206ax CPU core support
Marc Jones
2013-12-01
slippy/falco/peppy: Fix SPD GPIO initialization.
Aaron Durbin
2013-11-25
haswell: check for clean reset
Aaron Durbin
2013-11-24
haswell: Update ULT microcode to 0x10
Duncan Laurie
2013-11-24
haswell: Remove limit on package C-state
Duncan Laurie
2013-11-24
haswell: split microcode between ULT and non-ULT
Aaron Durbin
2013-11-24
haswell: Update ULT microcode to rev 'a'
Duncan Laurie
2013-11-24
haswell: Configure PCH power sharing for ULT
Duncan Laurie
2013-11-24
haswell: calibrate 24MHz clock against BCLK
Aaron Durbin
2013-11-24
haswell: configure c-states
Aaron Durbin
2013-11-24
haswell: Put each logical processor in its own P-state domain
Duncan Laurie
2013-11-24
haswell: Update microcode for ULT/40651 to rev 8
Duncan Laurie
2013-11-23
Rename SANDYBRIDGE_BCLK to NEHALEM_BCLK in 2065x.
Vladimir Serbinenko
2013-11-23
Remove MRC variables from 2065x CAR init.
Vladimir Serbinenko
2013-11-21
Fix error message on wrong compiles of 2065x
Vladimir Serbinenko
2013-11-13
intel/2065x: Use TSC for udelay()
Vladimir Serbinenko
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