| Age | Commit message (Expand) | Author |
|---|---|---|
| 2013-12-21 | exynos5420: re-factor clock_get_periph_rate() | David Hendricks |
| 2013-12-21 | exynos5420: add a peripheral clock select --> PLL decoder | David Hendricks |
| 2013-12-21 | exynos5420: add CPLL and DPLL to the known list of PLLs | David Hendricks |
| 2013-12-12 | exynos5420: Setup clocks for MMC bus controller. | Hung-Te Lin |
| 2013-07-10 | exynox5420: Remove the 5250 clock registers and fix the SPI frequency. | Gabe Black |
| 2013-07-10 | exynos5420: Fix some problems with the clock management code. | Gabe Black |
| 2013-07-10 | exynos5420: Replace the 5250 clock logic with 5420. | Gabe Black |
| 2013-07-10 | pit: Create an exynos5420 directory which is nearly a copy of exynos5250. | Gabe Black |
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index : coreboot | |
| Some coreboot project code with my work | vimacs |
| summaryrefslogtreecommitdiff |