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coreboot
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autoport-hsw
broadwell_refcode
e6230
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haswell-mrc
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Some coreboot project code with my work
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exynos5420
Age
Commit message (
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Author
2014-07-11
src: Make use of 'CEIL_DIV(a, b)' macro across tree
Edward O'Callaghan
2014-07-08
cpu: Trivial - drop trailing blank lines at EOF
Edward O'Callaghan
2014-07-05
spi: Change spi_xfer to work in units of bytes instead of bits.
Gabe Black
2014-07-05
spi: Remove unused parameters from spi_flash_probe and setup_spi_slave.
Gabe Black
2014-05-06
Introduce stage-specific architecture for coreboot
Furquan Shaikh
2014-05-03
Move ARCH_* from board/Kconfig to cpu or soc Kconfig.
Furquan Shaikh
2014-04-30
console: Move UART port defaults to mainboard
Kyösti Mälkki
2014-04-30
console: Drop EARLY_CONSOLE option
Kyösti Mälkki
2014-04-30
uart: Support multiple ports
Kyösti Mälkki
2014-04-09
uart: Redefine Kconfig options
Kyösti Mälkki
2014-04-09
console uart: Fill coreboot table entries
Kyösti Mälkki
2014-04-09
uart: Prepare to support multiple base addresses
Kyösti Mälkki
2014-03-04
console: Use single driver entry for UARTs
Kyösti Mälkki
2014-03-04
console: Fix includes
Kyösti Mälkki
2014-03-04
samsung/exynos5: Fix baudrate calculation
Kyösti Mälkki
2014-02-06
ARMv7: Remove static CBMEM allocation
Kyösti Mälkki
2013-12-21
pit: disable LCD FETs before doing any graphics init
David Hendricks
2013-12-21
exynos5420: Assign corect parent PLLs
David Hendricks
2013-12-21
exynos5420: don't assume MPLL for i2c parent clock
David Hendricks
2013-12-21
exynos5420: Set SPLL to 400MHz
David Hendricks
2013-12-21
exynos5420: re-factor clock_get_periph_rate()
David Hendricks
2013-12-21
exynos5420: add a peripheral clock select --> PLL decoder
David Hendricks
2013-12-21
exynos5420: add CPLL and DPLL to the known list of PLLs
David Hendricks
2013-12-21
exynos5420: correct the PMS value for CPLL
David Hendricks
2013-12-21
exynos5420: Configure the UART pins unconditionally
Gabe Black
2013-12-21
exynos5420: re-factor the SDMMC GPIO config routines
David Hendricks
2013-12-21
exynos5420: configure SD_0_CDn as VDDEN for eMMC
David Hendricks
2013-12-21
exynos5420: init APLL at 1800MHz
David Hendricks
2013-12-21
exynos5xxx: use oscillator clock when changing ARM frequency
David Hendricks
2013-12-21
exynos5420: set L2ACTLR parameters for A15 cores
David Hendricks
2013-12-21
exynos5420: minor correction to CPU frequency print
David Hendricks
2013-12-21
armv7/exynos: Fix and remove memory reset workarounds
Hung-Te Lin
2013-12-21
Pit: graphics
Ronald G. Minnich
2013-12-21
Pit: correctly initialize trust zone
Ronald G. Minnich
2013-12-21
exynos5420: update set_cpu_id()
David Hendricks
2013-12-21
Exynos 5420: Enable dynamic CBMEM
Stefan Reinauer
2013-12-21
exynos5420: Fix some clock settings
Gabe Black
2013-12-21
exynos5420: Fix the clock divisor mask
Gabe Black
2013-12-21
exynos5420: Get rid of the PWM code like on the 5250
Gabe Black
2013-12-21
exynos5420: Apply pwm const fix to the 5420 as well
Gabe Black
2013-12-20
armv7: Remove SYS_TEXT_BASE config.
Hung-Te Lin
2013-12-12
exynos5420: Setup clocks for MMC bus controller.
Hung-Te Lin
2013-09-28
exynos5420: Fix build warning
Allen Martin
2013-07-10
i2c: Change the type of the data parameter to uint8_t.
Gabe Black
2013-07-10
armv7/exynos5420: Remove the extra reopen when reading SPI.
Hung-Te Lin
2013-07-10
armv7/exynos5420: Apply new implementation for SPI transmission.
Hung-Te Lin
2013-07-10
armv7/exynos5420: Add output ability and half-duplex mode in SPI driver.
Hung-Te Lin
2013-07-10
armv7/exynos5420: Revise SPI open/close/reset procedure.
Hung-Te Lin
2013-07-10
armv7/exynos5420: Provide configuration for SPI0~SPI2.
Hung-Te Lin
2013-07-10
armv7/exynos5420: Change SPI module to standard <spi-generic> interface.
Hung-Te Lin
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