summaryrefslogtreecommitdiff
path: root/src/cpu/samsung/exynos5420
AgeCommit message (Expand)Author
2014-08-07exynos5420: Set the CLK_DIV_CPERI1 value as per manualDavid Hendricks
2014-08-07exynos: Set up caching in the bootblock.Gabe Black
2014-08-07Exynos5420: invoke the cooperative threading in udelayRonald G. Minnich
2014-08-06Exynos5: Remove unneeded USB delaysStefan Reinauer
2014-08-06Exynos5420: tighten up display port delaysRonald G. Minnich
2014-08-06exynos5420: Fix mmc clock source.Hung-Te Lin
2014-08-06Set armv7 up for cpu_info to work as on x86 (so threads can work)Ronald G. Minnich
2014-08-05exynos5420: get rid of old exynos5420_config_l2_cache()David Hendricks
2014-07-31timer: Add functions to initialize absolute timer structures.Gabe Black
2014-07-31armv7/exynos5420: Configure CPU cores for kernel to enable SMP.Hung-Te Lin
2014-07-11src: Make use of 'CEIL_DIV(a, b)' macro across treeEdward O'Callaghan
2014-07-08cpu: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-07-05spi: Change spi_xfer to work in units of bytes instead of bits.Gabe Black
2014-07-05spi: Remove unused parameters from spi_flash_probe and setup_spi_slave.Gabe Black
2014-05-06Introduce stage-specific architecture for corebootFurquan Shaikh
2014-05-03Move ARCH_* from board/Kconfig to cpu or soc Kconfig.Furquan Shaikh
2014-04-30console: Move UART port defaults to mainboardKyösti Mälkki
2014-04-30console: Drop EARLY_CONSOLE optionKyösti Mälkki
2014-04-30uart: Support multiple portsKyösti Mälkki
2014-04-09uart: Redefine Kconfig optionsKyösti Mälkki
2014-04-09console uart: Fill coreboot table entriesKyösti Mälkki
2014-04-09uart: Prepare to support multiple base addressesKyösti Mälkki
2014-03-04console: Use single driver entry for UARTsKyösti Mälkki
2014-03-04console: Fix includesKyösti Mälkki
2014-03-04samsung/exynos5: Fix baudrate calculationKyösti Mälkki
2014-02-06ARMv7: Remove static CBMEM allocationKyösti Mälkki
2013-12-21pit: disable LCD FETs before doing any graphics initDavid Hendricks
2013-12-21exynos5420: Assign corect parent PLLsDavid Hendricks
2013-12-21exynos5420: don't assume MPLL for i2c parent clockDavid Hendricks
2013-12-21exynos5420: Set SPLL to 400MHzDavid Hendricks
2013-12-21exynos5420: re-factor clock_get_periph_rate()David Hendricks
2013-12-21exynos5420: add a peripheral clock select --> PLL decoderDavid Hendricks
2013-12-21exynos5420: add CPLL and DPLL to the known list of PLLsDavid Hendricks
2013-12-21exynos5420: correct the PMS value for CPLLDavid Hendricks
2013-12-21exynos5420: Configure the UART pins unconditionallyGabe Black
2013-12-21exynos5420: re-factor the SDMMC GPIO config routinesDavid Hendricks
2013-12-21exynos5420: configure SD_0_CDn as VDDEN for eMMCDavid Hendricks
2013-12-21exynos5420: init APLL at 1800MHzDavid Hendricks
2013-12-21exynos5xxx: use oscillator clock when changing ARM frequencyDavid Hendricks
2013-12-21exynos5420: set L2ACTLR parameters for A15 coresDavid Hendricks
2013-12-21exynos5420: minor correction to CPU frequency printDavid Hendricks
2013-12-21armv7/exynos: Fix and remove memory reset workaroundsHung-Te Lin
2013-12-21Pit: graphicsRonald G. Minnich
2013-12-21Pit: correctly initialize trust zoneRonald G. Minnich
2013-12-21exynos5420: update set_cpu_id()David Hendricks
2013-12-21Exynos 5420: Enable dynamic CBMEMStefan Reinauer
2013-12-21exynos5420: Fix some clock settingsGabe Black
2013-12-21exynos5420: Fix the clock divisor maskGabe Black
2013-12-21exynos5420: Get rid of the PWM code like on the 5250Gabe Black
2013-12-21exynos5420: Apply pwm const fix to the 5420 as wellGabe Black
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-07 14:32:28 +0000