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Some coreboot project code with my work
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lapic_cpu_init.c
Age
Commit message (
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Author
2006-10-04
AMD Rev F support
Yinghai Lu
2006-05-18
init the ECC for BSP and AP at the same time. So reduce init cpus time
Yinghai Lu
2006-04-03
new cache_as_ram support
Yinghai Lu
2006-01-09
don't need copy_secondary_start_to_1m_below for non-smp
Yinghai Lu
2006-01-04
1M boundary for _RAMBASE=1M, and CONFIG_LB_TOPK 8M above support
Yinghai Lu
2005-12-14
issue 51 and 52: set mtrr for ap before stop it, and _RAMBASE above 1M
Yinghai Lu
2005-12-02
1201_ht_bus0_dev0_fidvid_core.diff
Stefan Reinauer
2005-09-12
Fix hang during secondary CPU sibling init caused by nested spinlocks.
Steven J. Magnani
2005-07-06
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-34
arch import user (historical)
2005-01-03
serialize cpus for >2
Yinghai Lu
2004-11-18
- First stab at getting the ppc ports building and working.
Eric Biederman
2004-10-29
Changes to allow Via/Epia code to be compiled after recent code changes.
Mark Wilkinson
2004-10-16
- HDAMA boots!
Eric Biederman
2004-10-16
- First stab at running linuxbios without the old static device tree.
Eric Biederman
2004-10-14
- Add new cvs code to cvs
Eric Biederman