summaryrefslogtreecommitdiff
path: root/src/cpu/x86/mtrr
AgeCommit message (Expand)Author
2014-06-30x86 MTRR: Drop unused return valueKyösti Mälkki
2014-06-30Use MTRR definesKyösti Mälkki
2014-02-25Remove CACHE_ROM.Vladimir Serbinenko
2014-02-09mtrr: only add prefetchable resources as WRCOMB for VGA devicesAaron Durbin
2014-02-06MTRR: Mark all prefetchable resources as WRCOMB.Vladimir Serbinenko
2014-02-06mtrr: retry fitting w/o WRCOMB if usage exceeds BIOS allocationAaron Durbin
2014-01-26src/cpu: Fix spelling of MTTR to MTRRPaul Menzel
2014-01-15Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRRKyösti Mälkki
2013-12-26AMD boards (non-AGESA): Cleanup earlymtrr.c includesKyösti Mälkki
2013-10-03cpu/x86/mtrr/mtrr.c: Remove superfluous assignment to `type_index`Paul Menzel
2013-07-11cpu: Fix spellingMartin Roth
2013-05-01x86: use boot state callbacks to disable rom cacheAaron Durbin
2013-04-04AMD: Drop six copies of wrmsr_amd and rdmsr_amdKyösti Mälkki
2013-04-01boot: add disable_cache_rom() functionAaron Durbin
2013-03-29x86: mtrr: optimize hole carving above 4GiBAaron Durbin
2013-03-29x86: mtrr: add hole punching supportAaron Durbin
2013-03-29x86: add rom cache variable MTRR index to tablesAaron Durbin
2013-03-29x86: mtrr: add CONFIG_CACHE_ROM supportAaron Durbin
2013-03-29mtrr: honor IORESOURCE_WRCOMBAaron Durbin
2013-03-29x86: add new mtrr implementationAaron Durbin
2013-03-22x86: unify amd and non-amd MTRR routinesAaron Durbin
2013-03-15Google Link: Add remaining code to support native graphicsRonald G. Minnich
2012-08-01Intel Sandybridge: add reserved memory as resourcesKyösti Mälkki
2012-07-24Rename cache_lbmem() to cache_ramstage()Stefan Reinauer
2012-07-24MTRR: drop repetetive debug messageStefan Reinauer
2012-07-16Check for IORESOURCE_UMA_FB in MTRR setupKyösti Mälkki
2012-07-16Define global uma_memory variablesKyösti Mälkki
2012-07-12Drop Kconfig VAR_MTRR_HOLE optionKyösti Mälkki
2012-05-30Fix the location of "Setting variable MTRR" printk.Denis 'GNUtoo' Carikli
2012-05-08Some more #if cleanupPatrick Georgi
2012-04-06Cache 8MB flash instead of 4MBStefan Reinauer
2012-03-30Make MTRR min hole alignment 64MBDuncan Laurie
2012-03-30Fix MB calculation in the reporting of the MTRR holeDuncan Laurie
2012-03-30MTRR: add alternate allocation method for odd memory mapsDuncan Laurie
2012-03-30Add an option to keep the ROM cached after romstageStefan Reinauer
2012-01-10MTRR: get physical address size from CPUIDSven Schnelle
2011-10-28Get rid of AUTO_XIP_ROM_BASEPatrick Georgi
2011-04-14earlymtrr.c: wipe some dead code, use names instead of numbers and someStefan Reinauer
2011-01-19Now that the VIA code is run above 1Meg (like other boards), it shouldKevin O'Connor
2010-11-13MTRR related improvements for AMD family 10h and family 0Fh systemsScott Duplichan
2010-09-30Rename build system variables to be more intuitive, andPatrick Georgi
2010-08-30We call this cache as ram everywhere, so let's call it the same in KconfigStefan Reinauer
2010-08-01make early_mtrr_init() invisible for cache as ram targets as it breaks them.Stefan Reinauer
2010-04-27Since some people disapprove of white space cleanups mixed in regular commitsStefan Reinauer
2010-04-14drop quite a lot of dead code that did nothing but produce warnings and makeStefan Reinauer
2010-04-09zero warnings days.Stefan Reinauer
2010-04-07clean up age old via epia target.Stefan Reinauer
2010-04-06No warnings day, next round.Stefan Reinauer
2010-04-03remove more warnings.Stefan Reinauer
2010-03-22printk_foo -> printk(BIOS_FOO, ...)Stefan Reinauer
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-09 21:12:01 +0000