summaryrefslogtreecommitdiff
path: root/src/cpu/x86
AgeCommit message (Expand)Author
2016-11-12cpu/x86/mtrr: allow temporary MTRR range during corebootAaron Durbin
2016-10-07src/cpu: Remove unnecessary whitespaceElyes HAOUAS
2016-09-12cpu/x86: Move fls() and fms() to mtrr.hRizwan Qureshi
2016-09-04src/cpu: Improve code formattingElyes HAOUAS
2016-08-28src/cpu: Add required space before opening parenthesis '('Elyes HAOUAS
2016-08-23src/cpu: Capitalize CPU, APIC and IOAPIC typo fixElyes HAOUAS
2016-08-18Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUSAaron Durbin
2016-07-31src/cpu: Capitalize CPUElyes HAOUAS
2016-07-31src/cpu: Capitalize ROM and RAMElyes HAOUAS
2016-07-27cpu/x86: Support CPUs without rdmsr/wrmsr instructionsLee Leahy
2016-07-22cpu/x86/mtrr: correct variable MTRR calculation around 1MiB boundaryAaron Durbin
2016-06-22ACPI S3: Move SMP trampoline recoveryKyösti Mälkki
2016-05-17intel/sch: Merge northbridge and southbridge in src/socStefan Reinauer
2016-05-06cpu/x86: don't treat all chipsets the same regarding XIP_ROM_SIZEAaron Durbin
2016-05-06cpu/x86/mp_init: reduce exposure of internal implementationAaron Durbin
2016-05-04cpu/x86: combine multiprocessor and SMM initializationAaron Durbin
2016-05-04cpu/x86: remove BACKUP_DEFAULT_SMM_REGION optionAaron Durbin
2016-05-04cpu/x86/smm_module_loader: always build with SMM module supportAaron Durbin
2016-05-02cpu/x86/mp_init: remove unused callback argumentsAaron Durbin
2016-04-28soc/intel/apollolake: Add cache for BIOS ROMAndrey Petrov
2016-04-11cpu/x86/tsc: Compile TSC timer for postcar as wellAndrey Petrov
2016-04-11cpu/x86/tsc: remove conditional compilationAaron Durbin
2016-04-11cpu/x86/tsc: compile same code for all stagesAaron Durbin
2016-04-11cpu/x86/tsc: prepare for CAR_GLOBAL in delay_tsc.cAaron Durbin
2016-04-11src/cpu/x86: remove TSC_CALIBRATE_WITH_IOAaron Durbin
2016-03-23arch/x86: introduce postcar stage/phaseAaron Durbin
2016-03-18mtrr: Define a function for obtaining free var mtrrFurquan Shaikh
2016-03-16cpu/x86: compile earlymtrr.c code for romstage as wellAndrey Petrov
2016-03-16cpu/x86/mtrr: remove early_mtrr_* functionsAaron Durbin
2016-03-16cpu/x86/mtrr: move cache_ramstage() to its only userAaron Durbin
2016-03-08cpu/x86/mtrr: add helper function to detect variable MTRRsAaron Durbin
2016-03-08cpu/x86: Sort some Kconfig optionsStefan Reinauer
2016-03-05arch/x86: document CAR symbols and expose them in symbols.hAndrey Petrov
2016-03-04arch/x86: always use _start as entry symbol for all stagesAaron Durbin
2016-03-04arch/x86: rename reset_vector -> _startAaron Durbin
2016-03-03cpu/x86/16bit: rename _start -> _start16bitAaron Durbin
2016-03-03cpu/x86/16bit/reset16: mark reset vector executableAaron Durbin
2016-03-03cpu/x86/16bit/reset16: remove stale 32-bit jumpAaron Durbin
2016-02-11cpu/x86/tsc: Compile delay_tsc.c for the bootblock as wellAlexandru Gagniuc
2016-02-02src: Fix various spelling and whitespace issues.Martin Roth
2016-01-28Move object files to $(obj)/<class>/Nico Huber
2016-01-28Makefile: Make full use of src-to-obj macroNico Huber
2016-01-21*/Makefile.inc: Compile files needed by uart8250 in x86 bootblockAlexandru Gagniuc
2016-01-20cpu: Fix typo that spelled "allocate" as "allocte."Jacob Laska
2015-12-02x86/smm: Initialize SMM on some CPUs one-by-oneDamien Zammit
2015-11-24FSP 1.0: Fix CAR issues - broken timestamps and consoleBen Gardner
2015-11-24Unify OBJCOPY arguments throughout various x86 stagesStefan Reinauer
2015-11-19x86: Add Kconfig to disable early bootblock postcodesMartin Roth
2015-11-14cpu/x86/lapic: Add stack overrun detectionTimothy Pearson
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-02 08:04:20 +0000