summaryrefslogtreecommitdiff
path: root/src/cpu/x86
AgeCommit message (Expand)Author
2017-06-13cpu/x86/mtrr: fail early if solution exceeds available MTRRsAaron Durbin
2017-06-12cpu/x86: fix spelling mistakeMartin Roth
2017-05-30arch/x86: Add function to determine if we're currently running from CARJulius Werner
2017-04-08arch/x86: remove CAR global migration when postcar stage is usedAaron Durbin
2017-03-19cpu/x86: add a barrier with timeoutBora Guvendik
2017-03-16cpu/x86: Fix misc. remaining issues detected by checkpatchLee Leahy
2017-03-16cpu/x86: Wrap lines at 80 columnsLee Leahy
2017-03-16cpu/x86: Add int to unsignedLee Leahy
2017-03-16cpu/x86: Remove braces and else if unnecessaryLee Leahy
2017-03-16cpu/x86: Use tabs for indentLee Leahy
2017-03-16cpu/x86: Fix various issues detected by checkpatch.plLee Leahy
2017-03-16src/cpu/x86: Remove space between * and variable nameLee Leahy
2017-02-22src/cpu/x86: Update/Add license headers to all filesMartin Roth
2016-12-16Set the fsb timer correctly for Netburst CPUsArthur Heymans
2016-12-11x86 SMM: Fix use with RELOCATABLE_RAMSTAGEKyösti Mälkki
2016-12-08cpu/x86: allow AP callbacks after MP initAaron Durbin
2016-12-08buildsystem: Drop explicit (k)config.h includesKyösti Mälkki
2016-11-12cpu/x86/mtrr: allow temporary MTRR range during corebootAaron Durbin
2016-10-07src/cpu: Remove unnecessary whitespaceElyes HAOUAS
2016-09-12cpu/x86: Move fls() and fms() to mtrr.hRizwan Qureshi
2016-09-04src/cpu: Improve code formattingElyes HAOUAS
2016-08-28src/cpu: Add required space before opening parenthesis '('Elyes HAOUAS
2016-08-23src/cpu: Capitalize CPU, APIC and IOAPIC typo fixElyes HAOUAS
2016-08-18Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUSAaron Durbin
2016-07-31src/cpu: Capitalize CPUElyes HAOUAS
2016-07-31src/cpu: Capitalize ROM and RAMElyes HAOUAS
2016-07-27cpu/x86: Support CPUs without rdmsr/wrmsr instructionsLee Leahy
2016-07-22cpu/x86/mtrr: correct variable MTRR calculation around 1MiB boundaryAaron Durbin
2016-06-22ACPI S3: Move SMP trampoline recoveryKyösti Mälkki
2016-05-17intel/sch: Merge northbridge and southbridge in src/socStefan Reinauer
2016-05-06cpu/x86: don't treat all chipsets the same regarding XIP_ROM_SIZEAaron Durbin
2016-05-06cpu/x86/mp_init: reduce exposure of internal implementationAaron Durbin
2016-05-04cpu/x86: combine multiprocessor and SMM initializationAaron Durbin
2016-05-04cpu/x86: remove BACKUP_DEFAULT_SMM_REGION optionAaron Durbin
2016-05-04cpu/x86/smm_module_loader: always build with SMM module supportAaron Durbin
2016-05-02cpu/x86/mp_init: remove unused callback argumentsAaron Durbin
2016-04-28soc/intel/apollolake: Add cache for BIOS ROMAndrey Petrov
2016-04-11cpu/x86/tsc: Compile TSC timer for postcar as wellAndrey Petrov
2016-04-11cpu/x86/tsc: remove conditional compilationAaron Durbin
2016-04-11cpu/x86/tsc: compile same code for all stagesAaron Durbin
2016-04-11cpu/x86/tsc: prepare for CAR_GLOBAL in delay_tsc.cAaron Durbin
2016-04-11src/cpu/x86: remove TSC_CALIBRATE_WITH_IOAaron Durbin
2016-03-23arch/x86: introduce postcar stage/phaseAaron Durbin
2016-03-18mtrr: Define a function for obtaining free var mtrrFurquan Shaikh
2016-03-16cpu/x86: compile earlymtrr.c code for romstage as wellAndrey Petrov
2016-03-16cpu/x86/mtrr: remove early_mtrr_* functionsAaron Durbin
2016-03-16cpu/x86/mtrr: move cache_ramstage() to its only userAaron Durbin
2016-03-08cpu/x86/mtrr: add helper function to detect variable MTRRsAaron Durbin
2016-03-08cpu/x86: Sort some Kconfig optionsStefan Reinauer
2016-03-05arch/x86: document CAR symbols and expose them in symbols.hAndrey Petrov
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-18 07:35:32 +0000