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path: root/src/cpu/x86
AgeCommit message (Expand)Author
2012-03-30Add an option to keep the ROM cached after romstageStefan Reinauer
2012-03-25Fix possible deadlock on SMP stop_this_cpuKyösti Mälkki
2012-03-16ROMCC boards have no XIP limitPatrick Georgi
2012-03-16Fix address of IDT in real-mode entryKyösti Mälkki
2012-03-09move console includes to central console/console.hStefan Reinauer
2012-03-07Move C labels to start-of-linePatrick Georgi
2012-02-17Remove whitespace.Patrick Georgi
2012-01-23post code: Replaced hard-coded post code with macroVikram Narayanan
2012-01-21trivial: spelling fixes in commentsVikram Narayanan
2012-01-20Leave SSE and MMX instructions enabled in corebootStefan Reinauer
2012-01-10MTRR: get physical address size from CPUIDSven Schnelle
2011-12-05Bootblock does not need a unique boot_cpu()Kyösti Mälkki
2011-11-24Remove unused code files and cosmetic changesKyösti Mälkki
2011-11-22Fix post_code in 16bit entryKyösti Mälkki
2011-11-01remove trailing whitespaceStefan Reinauer
2011-11-01Remove XIP_ROM_BASEPatrick Georgi
2011-10-28Get rid of AUTO_XIP_ROM_BASEPatrick Georgi
2011-10-15SMM: Move wbinvd after pmode jumpStefan Reinauer
2011-10-13Load an IDT with NULL limitStefan Reinauer
2011-09-12Miscellaneous AMD F14 warning fixesefdesign98
2011-07-22Add SSE3 dependent codeefdesign98
2011-07-04Small SMM fixupsRudolf Marek
2011-06-18SMM: flush caches after disabling cachingSven Schnelle
2011-06-15SMM: don't overwrite SMM memory on resumeSven Schnelle
2011-05-10This replaces the fixed shift values in the apic timer init with macros.Vikram Narayanan
2011-04-26Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as anStefan Reinauer
2011-04-19Fix some more misuses of ifdef/if definedStefan Reinauer
2011-04-14drop half an uart8250 implementation from smiutil and use the common code Stefan Reinauer
2011-04-14earlymtrr.c: wipe some dead code, use names instead of numbers and someStefan Reinauer
2011-04-14drop incorrectly used CONFIG_ROM_IMAGE_SIZE and unused CONFIG_ARCHStefan Reinauer
2011-04-11Unify use of post_codeAlexandru Gagniuc
2011-01-19Now that the VIA code is run above 1Meg (like other boards), it shouldKevin O'Connor
2010-12-18SMM for AMD K8 Part 1/2Stefan Reinauer
2010-12-18Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 boardPatrick Georgi
2010-12-16- Fix shortcoming in Kconfig when handling multiple "choice"sStefan Reinauer
2010-11-22Printing coreboot debug messages on VGA console is pretty much useless, sinceStefan Reinauer
2010-11-13MTRR related improvements for AMD family 10h and family 0Fh systemsScott Duplichan
2010-10-20Now that no boards set RAMBASE < 1M, get rid of some dead code. Trivial.Myles Watson
2010-10-19To reduce boot time, remove the double startup IPI and 10 ms delay from lapic...Scott Duplichan
2010-09-30Rename build system variables to be more intuitive, andPatrick Georgi
2010-09-29Forgot to 'svn add' src/cpu/x86/name (trivial).Uwe Hermann
2010-09-27Add a few missing license headers based on svn logs, and also add aUwe Hermann
2010-09-23Whitespace/typo/cosmetic fixes (trivial).Uwe Hermann
2010-09-09Adapt comment, too. (trivial)Patrick Georgi
2010-09-08Make timer2 the default choice for TSC initialization.Patrick Georgi
2010-09-072ms is enough time to accurately obtain the clock rate.Kevin O'Connor
2010-08-30We call this cache as ram everywhere, so let's call it the same in KconfigStefan Reinauer
2010-08-14clean up comment in entry32.incStefan Reinauer
2010-08-01make early_mtrr_init() invisible for cache as ram targets as it breaks them.Stefan Reinauer
2010-08-01- fix SMM code relocation raceStefan Reinauer
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