summaryrefslogtreecommitdiff
path: root/src/cpu
AgeCommit message (Expand)Author
2016-09-13cpu/amd/family_10h-family_15h: transition away from device_tAntonello Dettori
2016-09-12cpu/x86: Move fls() and fms() to mtrr.hRizwan Qureshi
2016-09-08Kconfig: Add option for microcode filenamesMartin Roth
2016-09-04src/cpu: Improve code formattingElyes HAOUAS
2016-08-28src/cpu: Add required space before opening parenthesis '('Elyes HAOUAS
2016-08-28src/cpu: Remove unnecessary whitespace before "\n"Elyes HAOUAS
2016-08-23src/cpu: Capitalize CPU, APIC and IOAPIC typo fixElyes HAOUAS
2016-08-18Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUSAaron Durbin
2016-08-18Kconfig: lay groundwork for not assuming SPI flash boot deviceAaron Durbin
2016-08-14cpu/ti/am355x: Fix array overrunPaul Menzel
2016-08-01Remove non-ascii & unprintable charactersMartin Roth
2016-07-31src/cpu: Capitalize CPUElyes HAOUAS
2016-07-31src/cpu: Capitalize ROM and RAMElyes HAOUAS
2016-07-27cpu/x86: Support CPUs without rdmsr/wrmsr instructionsLee Leahy
2016-07-26intel car: Use MTRR WRPROT type for XIP cacheKyösti Mälkki
2016-07-26intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZEKyösti Mälkki
2016-07-23intel/haswell: Remove useless MTRR clearKyösti Mälkki
2016-07-23intel/haswell post-car: Minor fix on MTRR settingKyösti Mälkki
2016-07-23intel/haswell: Add asmlinkage for romstage_after_car()Kyösti Mälkki
2016-07-22cpu/x86/mtrr: correct variable MTRR calculation around 1MiB boundaryAaron Durbin
2016-07-22intel car: Unify postcodesKyösti Mälkki
2016-07-22intel car: Unify whitespace and comment fixesKyösti Mälkki
2016-07-22intel car: Remove guard on XIP_ROM_SIZEKyösti Mälkki
2016-07-22intel model_106cx: Include CAR from socket directoryKyösti Mälkki
2016-07-21AMD k8 fam10: Fix CAR GLOBALS late in romstageKyösti Mälkki
2016-07-15AMD binaryPI: Use common romstage ram stackKyösti Mälkki
2016-07-15AMD binaryPI: Split romstage ram stackKyösti Mälkki
2016-07-15AMD binaryPI: Use common ACPI S3 recoveryKyösti Mälkki
2016-07-15AGESA: Use common romstage ram stackKyösti Mälkki
2016-07-15AGESA: Use common ACPI S3 recoveryKyösti Mälkki
2016-07-10intel post-car: Consolidate choose_top_of_stack()Kyösti Mälkki
2016-07-10AMD k8 fam10: Drop excessive spinlock initializationKyösti Mälkki
2016-07-10AMD k8 fam10: Fix romstage handoffKyösti Mälkki
2016-06-29AMD k8 fam10: Refactor S3 recoveryKyösti Mälkki
2016-06-29intel/haswell: No need for ACPI S3 resume backupKyösti Mälkki
2016-06-29intel romstage: Use run_ramstage()Kyösti Mälkki
2016-06-24region: Add writeat and eraseat supportAntonello Dettori
2016-06-22ACPI S3: Add common recovery codeKyösti Mälkki
2016-06-22ACPI S3: Move SMP trampoline recoveryKyösti Mälkki
2016-06-22Ignore RAMTOP for MTRRsKyösti Mälkki
2016-06-22intel/model_206ax: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki
2016-06-22intel/model_2065x: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki
2016-06-22intel cache-as-ram: Fix comment about MTRRsKyösti Mälkki
2016-06-21intel/model_6ex: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki
2016-06-21intel/car/cache_as_ram_ht.inc: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki
2016-06-21intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki
2016-06-20amd/fam_10h-fam_15h: allow building without microcode updatesArthur Heymans
2016-06-20amd/geode: Fix comment about ACPI S3Kyösti Mälkki
2016-06-20VIA C7 NANO: Fix early MTRR settingKyösti Mälkki
2016-06-18intel: Fix romstage main() with asmlinkageKyösti Mälkki
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-05 20:39:14 +0000