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Some coreboot project code with my work
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Age
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Author
2015-11-10
cpu/amd/car: Add romstage BSP stack overrun detection
Timothy Pearson
2015-11-10
cpu: Add a way to use microcode .h files back to the build
Martin Roth
2015-11-10
amd/model_fxx: fix code style in FID&VID support check
Urja Rannikko
2015-11-10
cpu/intel: Add socket BGA1284
Marc Jones
2015-11-08
cpu/amd/family_10h-family_15h: Increase BSP stack size
Timothy Pearson
2015-11-08
cpu/amd/family_10h-family_15h: Add Family 15h microcode file
Timothy Pearson
2015-11-06
amd/00730F01: Add correct CPU model
Kyösti Mälkki
2015-11-06
AMD binaryPI: Fix include paths
Kyösti Mälkki
2015-11-05
cpu/microcode: Remove EXTERNAL / ADDED_DURING_BUILD variables
Timothy Pearson
2015-11-03
cpu/amd/model_fxx: Backport PowerNow! core count fix from Family 10h
Timothy Pearson
2015-11-02
cpu/amd: Add initial AMD Family 15h support
Timothy Pearson
2015-11-02
cpu/amd/family_10h-family_15h: Use correct label for break state
Timothy Pearson
2015-11-02
cpu/amd: Move model_10xxx to family_10h-family_15h
Timothy Pearson
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-31
sandybridge: Disable parallel CPU initialization
Nico Huber
2015-10-30
cpu: port amd/pi to 64bit
Stefan Reinauer
2015-10-30
smm: 64bit fixes
Stefan Reinauer
2015-10-30
AMD mainboards: Fix 64bit BiosCallOuts.c
Stefan Reinauer
2015-10-30
cpu/amd/model_fxx: Clear out unused / stale MTRRs in ramstage
Timothy Pearson
2015-10-30
cpu/amd/model_fxx: Enable FIDVID code on Socket F K8
Timothy Pearson
2015-10-30
cpu/amd/model_fxx: Backport APIC code and debug aids from Family 10h
Timothy Pearson
2015-10-30
cpu/amd/car: Honor BKDG recommendations for DisFillP in CAR
Timothy Pearson
2015-10-30
cpu/amd/model_fxx: Fix invalid P-state power values
Timothy Pearson
2015-10-30
cpu/amd/model_fxx: Add Socket F CPU ID mappings
Timothy Pearson
2015-10-29
smmhandler: on i945..nehalem, crash if LAPIC overlaps with ASEG
Patrick Georgi
2015-10-28
cpu/intel/fsp_model_206ax: Load microcode in coreboot
Martin Roth
2015-10-27
cpu/amd/car: Add initial Suspend to RAM (S3) support
Timothy Pearson
2015-10-27
cpu: create an empty file when no microcode files are given
Alexander Couzens
2015-10-25
cpu/amd/car: Use standard integer types in post_cache_as_ram.c
Timothy Pearson
2015-10-25
cpu/amd/car: remove PRINTK_IN_CAR #define that was hardcoded to 1
Timothy Pearson
2015-10-24
cpu/amd: Add initial support for AMD Socket G34 processors
Timothy Pearson
2015-10-23
cpu/intel: Move Power notification ASL code into `common/acpi`
Paul Menzel
2015-10-23
cpu/amd/model_10xxx: Clean up debugging statements
Timothy Pearson
2015-10-22
model_fxx/powernow: add dual core Socket F TDPs
Jonathan A. Kollasch
2015-10-22
Revert "Remove sandybridge and ivybridge FSP code path"
Martin Roth
2015-10-16
cpu/amd/model_10xxx: Install AMD-provided microcode files in CBFS
Timothy Pearson
2015-10-15
cpu/x86/mtrr: Add MTRR index and total MTRRs to error message
Paul Menzel
2015-10-15
cpu/mtrr.h: Fix macro names for MTRR registers
Alexandru Gagniuc
2015-10-14
Revert "Remove FSP Rangeley SOC and mohonpeak board support"
Martin Roth
2015-10-14
cpu/amd/microcode: Update parser to use stock microcode blobs
Audrey Pearson
2015-10-14
x86: add standalone verstage support
Aaron Durbin
2015-10-08
arch/x86/bootblock: Do not include non-code files in bootblock.S
Alexandru Gagniuc
2015-10-07
x86/bootblock: Use LDFLAGS_bootblock to enable garbage collection
Alexandru Gagniuc
2015-10-05
cpu/Makefile.inc: Only inculde x86 subdir if ARCH_x86 is selected
Alexandru Gagniuc
2015-10-03
Remove FSP Rangeley SOC and mohonpeak board support
Alexandru Gagniuc
2015-10-03
Remove sandybridge and ivybridge FSP code path
Alexandru Gagniuc
2015-10-03
sandybridge ivybridge: Treat native init as first class citizen
Alexandru Gagniuc
2015-09-30
cpu: microcode: Use microcode stored in binary format
Alexandru Gagniuc
2015-09-24
coreboot: move TS_END_ROMSTAGE to one spot
Aaron Durbin
2015-09-14
qemu: initialize lapic
Gerd Hoffmann
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