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path: root/src/cpu
AgeCommit message (Expand)Author
2020-07-08haswell: relocate `romstage_common` to northbridgeAngel Pons
2020-07-08nb/intel/haswell: Drop unnecessary variableAngel Pons
2020-07-08haswell: drop unused function parameterAngel Pons
2020-07-08ACPI: Add and fill gnvs_ptr for smm_runtimeKyösti Mälkki
2020-07-08cpu/x86/smm: Add support for long modePatrick Rudolph
2020-07-01ACPI GNVS: Replace uses of smm_get_gnvs()Kyösti Mälkki
2020-06-24ACPI: Replace smm_setup_structures()Kyösti Mälkki
2020-06-23src/*: Update makefiles to exclude x86 code from psp-verstageMartin Roth
2020-06-22cpu/x86/lapic: Support x86_64 and clean up codePatrick Rudolph
2020-06-17cpu/x86/smm: Add helper functions to verify SMM accessPatrick Rudolph
2020-06-16Revert "x86/lapic: Set EXTINT on BSP only"Angel Pons
2020-06-16x86/lapic: Set EXTINT on BSP onlyZheng Bao
2020-06-16cpu/x86: Define MTRR_CAP_PRMRRKyösti Mälkki
2020-06-16sb,soc/intel: Replace smm_southbridge_enable_smi()Kyösti Mälkki
2020-06-16arch/x86: Create helper for APM_CNT SMI triggersKyösti Mälkki
2020-06-15gm45 boards: Factor out MAX_CPUSAngel Pons
2020-06-15pineview boards: Factor out MAX_CPUSAngel Pons
2020-06-15haswell boards: Factor out MAX_CPUSAngel Pons
2020-06-15arrandale boards: Factor out MAX_CPUSAngel Pons
2020-06-15sandybridge boards: Factor out MAX_CPUSAngel Pons
2020-06-15cpu/intel: Remove obsolete comment in CAR setupKyösti Mälkki
2020-06-15arch/x86: Remove NO_FIXED_XIP_ROM_SIZEKyösti Mälkki
2020-06-15arch/x86: Remove XIP_ROM_SIZEKyösti Mälkki
2020-06-13cpu/intel/car: Use symbols for CAR MTRR setupKyösti Mälkki
2020-06-13treewide: Add Kconfig variable MEMLAYOUT_LD_FILEFurquan Shaikh
2020-06-10amd/00730F01: Clean the Microcode updatingZheng Bao
2020-06-06src: Remove unused 'include <cpu/x86/mtrr.h>'Elyes HAOUAS
2020-06-06cpu/intel/haswell: Remove unused 'include <cpu/x86/bist.h>'Elyes HAOUAS
2020-06-06src: Remove unused '#include <cpu/x86/smm.h>'Elyes HAOUAS
2020-06-04cpu/intel/slot_1: Select 16KiB bootblock if console is enabledKeith Hui
2020-06-02amd/microcode: Change equivalant ID width to 16bitZheng Bao
2020-06-02cpu/x86/mtrr: add x86_setup_mtrrs_with_detect_no_above_4gb()Aaron Durbin
2020-06-02cpu/x86/mtrr: add helper for setting multiple MTRRsAaron Durbin
2020-06-02src: Remove unused '#include <cpu/x86/lapic.h>'Elyes HAOUAS
2020-05-28arch/x86: Remove more romcc leftoversKyösti Mälkki
2020-05-28cpu/intel/common: Fix typo in commentElyes HAOUAS
2020-05-18src: Remove leading blank lines from SPDX headerElyes HAOUAS
2020-05-13src: Remove unused '#include <stddef.h>'Elyes HAOUAS
2020-05-13src: Remove unused '#include <stdint.h>'Elyes HAOUAS
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-10src/cpu: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-05-09src/: Replace GPL boilerplate with SPDX headersPatrick Georgi
2020-05-08cpu/x86/mtrr: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-05-06treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi
2020-05-06treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi
2020-05-02acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh
2020-05-02intel/stm: Drop now unneeded `num_cpus` paramEugene D Myers
2020-05-02intel/stm: Place resource list right below MSEGEugene D Myers
2020-05-01cpu/x86/mtrr/earlymtrr: Validate MTRR argumentsRaul E Rangel
2020-05-01src: Remove unused 'include <cpu/x86/cache.h>'Elyes HAOUAS