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path: root/src/cpu
AgeCommit message (Expand)Author
2013-04-08exynos5250: add missing address-of operator in UART driverDavid Hendricks
2013-04-08snow/exynos5250: move board-specific power stuff to mainboard dirDavid Hendricks
2013-04-06exynos5250: add a chip.h file for the display register settingsRonald G. Minnich
2013-04-05exynos5-common: get rid of displayport trial codeRonald G. Minnich
2013-04-04AMD: Drop six copies of wrmsr_amd and rdmsr_amdKyösti Mälkki
2013-04-03haswell: enable ROM cachingAaron Durbin
2013-04-03haswell: keep ROM cache enabledAaron Durbin
2013-04-03haswell: use new interface to disable rom cachingAaron Durbin
2013-04-01boot: add disable_cache_rom() functionAaron Durbin
2013-04-01Minor Kconfig help text fixStefan Tauner
2013-04-01lynxpoint: split clearing and enabling of smmAaron Durbin
2013-03-29exynos5250: Add function for configuring L2 cacheDavid Hendricks
2013-03-29x86: mtrr: optimize hole carving above 4GiBAaron Durbin
2013-03-29x86: mtrr: add hole punching supportAaron Durbin
2013-03-29x86: add rom cache variable MTRR index to tablesAaron Durbin
2013-03-29x86: mtrr: add CONFIG_CACHE_ROM supportAaron Durbin
2013-03-29mtrr: honor IORESOURCE_WRCOMBAaron Durbin
2013-03-29x86: add new mtrr implementationAaron Durbin
2013-03-27exynos5250: assign RAM resources in cpu_init()David Hendricks
2013-03-26Revert "samsung/exynos5: add resource functions for the display port"David Hendricks
2013-03-26samsung/exynos5: add resource functions for the display portRonald G. Minnich
2013-03-22x86: unify amd and non-amd MTRR routinesAaron Durbin
2013-03-22haswell: Add microcode for ULT C0 stepping 0x40651Duncan Laurie
2013-03-22haswell: vboot path support in romstageAaron Durbin
2013-03-22haswell: use dynamic cbmemAaron Durbin
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer
2013-03-21Intel: Update CPU microcode for 6fx CPUsStefan Reinauer
2013-03-21Intel: Update CPU microcode for 106cx CPUsStefan Reinauer
2013-03-21Intel: Update CPU microcode scriptStefan Reinauer
2013-03-21lynxpoint: Add helper functions for reading PM and GPIO baseDuncan Laurie
2013-03-21haswell: RESET_ON_INVALID_RAMSTAGE_CACHE optionAaron Durbin
2013-03-21haswell: implement ramstage caching in SMM regionAaron Durbin
2013-03-21haswell: add multipurpose SMM memory regionAaron Durbin
2013-03-21haswell: set TSEG as WB cacheable in romstageAaron Durbin
2013-03-21haswell: support for parallel SMM relocationAaron Durbin
2013-03-21haswell: use s3_resume field in romstage_handoffAaron Durbin
2013-03-21x86: protect against abi assumptions from compilerAaron Durbin
2013-03-21haswell: support for CONFIG_RELOCATABLE_RAMSTAGEAaron Durbin
2013-03-21ramstage: prepare for relocationAaron Durbin
2013-03-20Intel: Update CPU microcode for Sandybridge/Ivybridge CPUsStefan Reinauer
2013-03-20Intel: Update CPU microcode for 1067x CPUsStefan Reinauer
2013-03-19armv7/exynos/snow: new cache maintenance APIDavid Hendricks
2013-03-19haswell: wait 10ms after INIT IPIAaron Durbin
2013-03-19haswell: Parallel AP bringupAaron Durbin
2013-03-19intel microcode: split up microcode loading stagesAaron Durbin
2013-03-18SMM: link against libgccStefan Reinauer
2013-03-18haswell: add romstage_after_car() functionAaron Durbin
2013-03-18haswell: move call site of save_mrc_data()Aaron Durbin
2013-03-18haswell: romstage: pass stack pointer and MTRRsAaron Durbin
2013-03-18haswell: unify romstage logicAaron Durbin
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