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AgeCommit message (Expand)Author
2020-11-09cpu/intel/model_206ax: Get CPU frequencies for SMBIOS type 4Michał Żygowski
2020-11-09cpu/x86/smm: Add a common save state handlingArthur Heymans
2020-11-09cpu/x86/smm/smm.ld: Assert that CONFIG_MAX_CPUS <= 4Arthur Heymans
2020-11-09cpu/x86/smm/smihandler.c: Simplify smm revision handlingArthur Heymans
2020-11-03cpu/intel/haswell: Move smmrelocate.c MSR definitions to headerAngel Pons
2020-11-03cpu/x86/mp_init: Add support for x86_64Patrick Rudolph
2020-11-02cpu/intel/car/non-evict/cache_as_ram.S: Add support for longmodePatrick Rudolph
2020-11-02cpu/x86/smm: Pass smm.ld through src-to-objArthur Heymans
2020-10-31cpu/x86/lapic: rename virtual wire mode initialization functionFelix Held
2020-10-31{cpu,nb}/intel/haswell: Drop unnecessary `UL` suffixAngel Pons
2020-10-31cpu/intel/common: correct MSR for the Nominal Performance in CPPCMichael Niewöhner
2020-10-30cpu/x86/sipi_vector.S: Use correct suffix for btsJacob Garber
2020-10-30cpu/x86: increase timeout for CPUs to check in after 2nd SIPIJonathan Zhang
2020-10-30cpu/intel/Makefile.inc: Use correct Kconfig symbolsAngel Pons
2020-10-27cpu/x86/mtrr: fix OVERFLOW_BEFORE_WIDENJonathan Zhang
2020-10-26cpu/intel/common: implement the two missing CPPC v2 autonomous registersMichael Niewöhner
2020-10-24cpu/intel/common: rework code previously moved to common cpu codeMichael Niewöhner
2020-10-24{cpu,soc}/intel: deduplicate cpu codeMichael Niewöhner
2020-10-23haswell/broadwell: Fix typos of `BCLK`Angel Pons
2020-10-21cpu/intel/common: Fix regressionPatrick Rudolph
2020-10-21{cpu,soc}/intel: replace AES-NI locking by common implemenation callMichael Niewöhner
2020-10-20cpu/x86/mtrr: add support for address space higher than 16TiBJonathan Zhang
2020-10-20cpu/intel/model_{2065x,206ax}: fix AES-NI lockingMichael Niewöhner
2020-10-19cpu/intel/common: add a Kconfig to control AES-NI lockingMichael Niewöhner
2020-10-19cpu/intel/common: only lock AES-NI when supportedMichael Niewöhner
2020-10-19cpu/intel/common: rework AES-NI lockingMichael Niewöhner
2020-10-19soc/intel/skl,cpu/intel: copy AES-NI locking to common cpu codeMichael Niewöhner
2020-10-17cpu/intel,soc/intel: drop Kconfig for hyperthreadingMichael Niewöhner
2020-10-16include/cpu/x86: introduce new helper for (un)setting MSRsMichael Niewöhner
2020-10-14haswell/lynxpoint: Align cosmetics with BroadwellAngel Pons
2020-10-12cpu/qemu-x86/cache_as_ram_bootblock: Fix wrong instructionPatrick Rudolph
2020-10-02drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES configShelley Chen
2020-09-29cpu/qemu-x86/car: Move long mode entry right before c entryPatrick Rudolph
2020-09-29cpu/x86/smm/smihandler.c: Implement smm_get_save_state()Arthur Heymans
2020-09-29cpu/x86/smm/smmhandler.c: Get revision using C codeArthur Heymans
2020-09-28cpu/intel/206ax/acpi.c: Fix get_cores_per_packageEvgeny Zinoviev
2020-09-27cpu/intel/haswell/smmrelocate.c: Spell `CPU` in uppercaseAngel Pons
2020-09-27cpu/intel/haswell/haswell_init.c: Align printk's with BroadwellAngel Pons
2020-09-26cpu/qemu-x86: Drop select SMPKyösti Mälkki
2020-09-26arch/x86: Introduce `ARCH_ALL_STAGES_X86_32`Angel Pons
2020-09-26arch/x86: Introduce `ARCH_ALL_STAGES_X86_64`Angel Pons
2020-09-21src/cpu: Drop unneeded empty linesElyes HAOUAS
2020-09-21cpu/x86/smm.h: Add function to return the SMM save state revisionArthur Heymans
2020-09-12cpu/intel/model_1067x: enable PECIMichael Büchler
2020-08-30cpu/intel/haswell: Set LT_LOCK_MEMORY MSR on finalize stepAngel Pons
2020-08-30cpu/x86/smm/smmhandler: Fix x86_64 assembly exitPatrick Rudolph
2020-08-24Revert "cpu/x86/sipi: Add x86_64 support"Patrick Rudolph
2020-08-24cpu/x86/smm/smm_module_handler: Add x86_64 supportPatrick Rudolph
2020-08-24cpu/x86/sipi: Add x86_64 supportPatrick Rudolph
2020-08-21cpu/intel/haswell: Select HAVE_ASAN_IN_ROMSTAGEHarshit Sharma
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