coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-12-04	cpu/x86/lapic/secondary.S: Adapt for x86_64	Arthur Heymans
2020-12-04	cpu/qemu-x86: Add the option to have no SMM	Arthur Heymans
2020-12-02	cbfs: Simplify load/map API names, remove type arguments	Julius Werner
2020-12-02	cpu/x86/smm/smm_stub: Fix stack canary on x86_64	Patrick Rudolph
2020-12-02	cpu/x86/smm/smm_stub: Fix GDT for x86_64	Patrick Rudolph
2020-12-01	cpu/x86/early_reset: Mark assemblycode as 32bit	Patrick Rudolph
2020-12-01	cpu/intel/microcode: Mark assemblycode as 32bit	Patrick Rudolph
2020-12-01	cpu/x86/sipi: Add x86_64 support	Patrick Rudolph
2020-11-27	Makefile.inc: Move adding mcu FIT entries	Arthur Heymans
2020-11-22	cpu/intel/common: Fill cpu voltage in SMBIOS tables	Patrick Rudolph
2020-11-22	cpu/amd/microcode: Remove dead Makefile	Arthur Heymans
2020-11-22	cpu/amd/pi: Remove unused cpu code 00660F01	Martin Roth
2020-11-21	intel/socket_441: Increase bootblock size	Julius Werner
2020-11-19	ACPI S3: Replace acpi_is_wakeup()	Kyösti Mälkki
2020-11-17	Revert "arch\|cpu/x86: Add Kconfig option for x86 reset vector"	Kyösti Mälkki
2020-11-16	cpu/x86/smm/smm_module_loaderv2: Properly print stack_end	Arthur Heymans
2020-11-16	cpu/x86/smm/smm_module_loaderv2.c: Use more variables	Arthur Heymans
2020-11-16	cpu/x86/smm: Check that the stub size is < save state size	Arthur Heymans
2020-11-10	cpu/x86/mtrr.h: Rename CORE2 alternative SMRR registers	Arthur Heymans
2020-11-10	sec/intel/cbnt: Stitch in ACMs in the coreboot image	Arthur Heymans
2020-11-09	cpu/intel/model_206ax: Get CPU frequencies for SMBIOS type 4	Michał Żygowski
2020-11-09	cpu/x86/smm: Add a common save state handling	Arthur Heymans
2020-11-09	cpu/x86/smm/smm.ld: Assert that CONFIG_MAX_CPUS <= 4	Arthur Heymans
2020-11-09	cpu/x86/smm/smihandler.c: Simplify smm revision handling	Arthur Heymans
2020-11-03	cpu/intel/haswell: Move smmrelocate.c MSR definitions to header	Angel Pons
2020-11-03	cpu/x86/mp_init: Add support for x86_64	Patrick Rudolph
2020-11-02	cpu/intel/car/non-evict/cache_as_ram.S: Add support for longmode	Patrick Rudolph
2020-11-02	cpu/x86/smm: Pass smm.ld through src-to-obj	Arthur Heymans
2020-10-31	cpu/x86/lapic: rename virtual wire mode initialization function	Felix Held
2020-10-31	{cpu,nb}/intel/haswell: Drop unnecessary `UL` suffix	Angel Pons
2020-10-31	cpu/intel/common: correct MSR for the Nominal Performance in CPPC	Michael Niewöhner
2020-10-30	cpu/x86/sipi_vector.S: Use correct suffix for bts	Jacob Garber
2020-10-30	cpu/x86: increase timeout for CPUs to check in after 2nd SIPI	Jonathan Zhang
2020-10-30	cpu/intel/Makefile.inc: Use correct Kconfig symbols	Angel Pons
2020-10-27	cpu/x86/mtrr: fix OVERFLOW_BEFORE_WIDEN	Jonathan Zhang
2020-10-26	cpu/intel/common: implement the two missing CPPC v2 autonomous registers	Michael Niewöhner
2020-10-24	cpu/intel/common: rework code previously moved to common cpu code	Michael Niewöhner
2020-10-24	{cpu,soc}/intel: deduplicate cpu code	Michael Niewöhner
2020-10-23	haswell/broadwell: Fix typos of `BCLK`	Angel Pons
2020-10-21	cpu/intel/common: Fix regression	Patrick Rudolph
2020-10-21	{cpu,soc}/intel: replace AES-NI locking by common implemenation call	Michael Niewöhner
2020-10-20	cpu/x86/mtrr: add support for address space higher than 16TiB	Jonathan Zhang
2020-10-20	cpu/intel/model_{2065x,206ax}: fix AES-NI locking	Michael Niewöhner
2020-10-19	cpu/intel/common: add a Kconfig to control AES-NI locking	Michael Niewöhner
2020-10-19	cpu/intel/common: only lock AES-NI when supported	Michael Niewöhner
2020-10-19	cpu/intel/common: rework AES-NI locking	Michael Niewöhner
2020-10-19	soc/intel/skl,cpu/intel: copy AES-NI locking to common cpu code	Michael Niewöhner
2020-10-17	cpu/intel,soc/intel: drop Kconfig for hyperthreading	Michael Niewöhner
2020-10-16	include/cpu/x86: introduce new helper for (un)setting MSRs	Michael Niewöhner
2020-10-14	haswell/lynxpoint: Align cosmetics with Broadwell	Angel Pons