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Some coreboot project code with my work
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Age
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Author
2015-12-30
x86 chipsets: Link non-code flow CHIPSET_BOOTBLOCK_INCLUDE files
Alexandru Gagniuc
2015-12-25
cpu/allwinner/a10: Fix I2c speed calculation
Martin Roth
2015-12-18
drivers/pc80: Add optional spinlock for nvram CBFS access
Timothy Pearson
2015-12-18
cpu/samsung/exynos5250: Move update-bl1.sh to 3rdparty/blobs/
Stefan Reinauer
2015-12-17
Drop src/cpu/ indirection for MIPS
Stefan Reinauer
2015-12-15
src/console: Add x86 romstage spinlock option and printk spinlock support
Timothy Pearson
2015-12-08
qemu-x86: Enable SMP support
Patrick Georgi
2015-12-06
Remove #ifdef checks on Kconfig symbols
Martin Roth
2015-12-06
fsp_model_406dx: use external microcode .h files for rangeley
Martin Roth
2015-12-02
x86/smm: Initialize SMM on some CPUs one-by-one
Damien Zammit
2015-12-01
cpu/amd/fam10h-15h: Enable DFE on Family 15h HT3 links
Timothy Pearson
2015-12-01
cpu/amd/fam10h-15h: Fix link type detection and XCS buffer count setup
Timothy Pearson
2015-12-01
cpu/amd/fam10h-15h: Force iolink detect to either 1 or 0
Timothy Pearson
2015-11-30
cpu/amd/family_10h-family_15h: Apply missing Family 15h errata fixes
Timothy Pearson
2015-11-26
amd/car: don't apply Fam10h/Fam12h Errata 343 fix to Fam0Fh
Jonathan A. Kollasch
2015-11-24
FSP 1.0: Fix CAR issues - broken timestamps and console
Ben Gardner
2015-11-24
northbridge/amd/amdht: Add isochronous setup support
Timothy Pearson
2015-11-24
amd/amdfam10: Control Fam15h cache partitioning via nvram
Timothy Pearson
2015-11-24
Unify OBJCOPY arguments throughout various x86 stages
Stefan Reinauer
2015-11-24
cpu/intel/socket_FCBGA559: Add new socket for Atom D5xx
Damien Zammit
2015-11-23
cpu/amd/fam15h: Set up Link Base Channel Buffer Count registers
Timothy Pearson
2015-11-23
cpu/amd: de-duplicate MSR include files
Stefan Reinauer
2015-11-22
cpu/amd/fam10h15h: Set up SRI to XCS Token Count registers on Family 15h
Timothy Pearson
2015-11-22
cpu/amd/family_10h-family_15h: Set up cache controls on Family 15h to improve...
Timothy Pearson
2015-11-22
cpu/amd/family_10h-family_15h: Set up link XCS token counts on Family 15h
Timothy Pearson
2015-11-22
cpu/amd/family_10h-family_15h: Configure NB register 2
Timothy Pearson
2015-11-21
cpu/amd/car/post_cache_as_ram: Avoid trailing spaces
Paul Menzel
2015-11-21
amd/family_10h-family_15h: Fix poor performance on Family 15h CPUs
Timothy Pearson
2015-11-20
northbridge/amd/amdht: Add support for HT3 2.8GHz and up link frequencies
Timothy Pearson
2015-11-20
cpu/amd/family_10h-family_15h: Fix incorrect revision detection
Timothy Pearson
2015-11-20
nb/amd/amdfam10: Add HyperTransport probe filter support
Timothy Pearson
2015-11-20
fsp1_0: Remove hardcoded microcode locations
Martin Roth
2015-11-20
cpu/amd/fam10h-fam15h: Set northbridge throttle values
Timothy Pearson
2015-11-19
cpu/amd/fam10h-fam15h: Bring HT register configuration in line with BKDG
Timothy Pearson
2015-11-19
x86: Add Kconfig to disable early bootblock postcodes
Martin Roth
2015-11-18
cpu/amd/fam10h-fam15h: Update Fam15h APIC config and startup sequence
Timothy Pearson
2015-11-16
intel/fsp_model_406dx: Load APs microcode in model_406dx_init
David Guckian
2015-11-16
intel/fsp_rangeley: Load BSP microcode in bootblock
David Guckian
2015-11-16
cpu/amd/fam10h-15h: Fix BSP stack corruption on 32-core Fam10 systems
Timothy Pearson
2015-11-15
amd/model_fxx: Check FID&VID Support for the BSP (too)
Urja Rannikko
2015-11-15
cpu/amd: Fix AMD Family 15h ECC initialization reliability issues
Timothy Pearson
2015-11-14
cpu/x86/lapic: Add stack overrun detection
Timothy Pearson
2015-11-11
cpu/amd: Add CC6 support
Timothy Pearson
2015-11-10
cpu/amd/car: Add romstage BSP stack overrun detection
Timothy Pearson
2015-11-10
cpu: Add a way to use microcode .h files back to the build
Martin Roth
2015-11-10
amd/model_fxx: fix code style in FID&VID support check
Urja Rannikko
2015-11-10
cpu/intel: Add socket BGA1284
Marc Jones
2015-11-08
cpu/amd/family_10h-family_15h: Increase BSP stack size
Timothy Pearson
2015-11-08
cpu/amd/family_10h-family_15h: Add Family 15h microcode file
Timothy Pearson
2015-11-06
amd/00730F01: Add correct CPU model
Kyösti Mälkki
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