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path: root/src/cpu
AgeCommit message (Expand)Author
2015-10-30cpu/amd/car: Honor BKDG recommendations for DisFillP in CARTimothy Pearson
2015-10-30cpu/amd/model_fxx: Fix invalid P-state power valuesTimothy Pearson
2015-10-30cpu/amd/model_fxx: Add Socket F CPU ID mappingsTimothy Pearson
2015-10-29smmhandler: on i945..nehalem, crash if LAPIC overlaps with ASEGPatrick Georgi
2015-10-28cpu/intel/fsp_model_206ax: Load microcode in corebootMartin Roth
2015-10-27cpu/amd/car: Add initial Suspend to RAM (S3) supportTimothy Pearson
2015-10-27cpu: create an empty file when no microcode files are givenAlexander Couzens
2015-10-25cpu/amd/car: Use standard integer types in post_cache_as_ram.cTimothy Pearson
2015-10-25cpu/amd/car: remove PRINTK_IN_CAR #define that was hardcoded to 1Timothy Pearson
2015-10-24cpu/amd: Add initial support for AMD Socket G34 processorsTimothy Pearson
2015-10-23cpu/intel: Move Power notification ASL code into `common/acpi`Paul Menzel
2015-10-23cpu/amd/model_10xxx: Clean up debugging statementsTimothy Pearson
2015-10-22model_fxx/powernow: add dual core Socket F TDPsJonathan A. Kollasch
2015-10-22Revert "Remove sandybridge and ivybridge FSP code path"Martin Roth
2015-10-16cpu/amd/model_10xxx: Install AMD-provided microcode files in CBFSTimothy Pearson
2015-10-15cpu/x86/mtrr: Add MTRR index and total MTRRs to error messagePaul Menzel
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-10-14Revert "Remove FSP Rangeley SOC and mohonpeak board support"Martin Roth
2015-10-14cpu/amd/microcode: Update parser to use stock microcode blobsAudrey Pearson
2015-10-14x86: add standalone verstage supportAaron Durbin
2015-10-08arch/x86/bootblock: Do not include non-code files in bootblock.SAlexandru Gagniuc
2015-10-07x86/bootblock: Use LDFLAGS_bootblock to enable garbage collectionAlexandru Gagniuc
2015-10-05cpu/Makefile.inc: Only inculde x86 subdir if ARCH_x86 is selectedAlexandru Gagniuc
2015-10-03Remove FSP Rangeley SOC and mohonpeak board supportAlexandru Gagniuc
2015-10-03Remove sandybridge and ivybridge FSP code pathAlexandru Gagniuc
2015-10-03sandybridge ivybridge: Treat native init as first class citizenAlexandru Gagniuc
2015-09-30cpu: microcode: Use microcode stored in binary formatAlexandru Gagniuc
2015-09-24coreboot: move TS_END_ROMSTAGE to one spotAaron Durbin
2015-09-14qemu: initialize lapicGerd Hoffmann
2015-09-09linking: add and use LDFLAGS_commonAaron Durbin
2015-09-09rmodule: use program.ld for linkingAaron Durbin
2015-09-09x86: link romstage like the other architecturesAaron Durbin
2015-09-09intel/model_2065x/Kconfig: Don't use LAPIC_MONOTONIC_TIMERMartin Roth
2015-09-09x86: bootblock: remove linking and program flow from build systemAaron Durbin
2015-09-08cpu: fix cpu_microcode classAaron Durbin
2015-09-07microcode: Unify rules to add microcode to CBFS once againAlexandru Gagniuc
2015-09-05amd/geode_lx: make done_cache_as_ram_main globalAaron Durbin
2015-09-04x86: remove cpu_incs as romstage Make variableAaron Durbin
2015-08-25Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in KconfigMartin Roth
2015-08-14cpu/amd/model_10xxx: Do not initialize SMM memory if SMM is disabledTimothy Pearson
2015-08-13amd: raminit sysinfo offset fixAaron Durbin
2015-08-07via/nano: Move CPU microcode to 3rdparty/blobsStefan Reinauer
2015-08-07amd/model_fxx: Move CPU microcode to 3rdparty/blobsStefan Reinauer
2015-08-07amd/model_10xxx: Move CPU microcode to 3rdparty/blobsStefan Reinauer
2015-07-29Add SoC specific microcode update check in ramstageRizwan Qureshi
2015-07-22amd/model_fxx: set CPU_ADDR_BITS to 40 on all K8 machinesJonathan A. Kollasch
2015-07-21cpu: port amd/agesa to 64bitStefan Reinauer
2015-07-17indent style fix for lapic_cpu_init.cJonathan A. Kollasch
2015-07-17Remove unused Kconfig symbols in c codeMartin Roth
2015-07-15amd/model_fxx rev.F: emit P-states when no intermediates existJonathan A. Kollasch
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