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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
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cpu
Age
Commit message (
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Author
2006-05-04
fix the tree
Stefan Reinauer
2006-05-04
core range and set_init_ram_access
Yinghai Lu
2006-05-04
rm unused file
Yinghai Lu
2006-05-04
merge zrom to rom_stream and print olen ilen
Yinghai Lu
2006-05-03
oops! Slap me on the head for this one. Quick fix for ward until
Stefan Reinauer
2006-05-02
add automatic payload compression method to LinuxBIOS
Stefan Reinauer
2006-05-02
Fall back to pre-broken settings and setup for GX2.
Ronald G. Minnich
2006-04-27
code cleanup, comments added
Li-Ta Lo
2006-04-20
boot to kernel
Li-Ta Lo
2006-04-13
add SystemPreInit() and support
Ronald G. Minnich
2006-04-13
minor modification
Li-Ta Lo
2006-04-10
add cpureginit to romcc code.
Ronald G. Minnich
2006-04-10
clean up gx2def.h a bit.
Ronald G. Minnich
2006-04-06
add bug support for 2.1
Ronald G. Minnich
2006-04-06
reformat
Li-Ta Lo
2006-04-06
more fix for vsm, not working yet
Li-Ta Lo
2006-04-03
did I commit the last change?
Li-Ta Lo
2006-04-03
new cache_as_ram support
Yinghai Lu
2006-03-22
added this file
Ronald G. Minnich
2006-03-21
add vsm support
Ronald G. Minnich
2006-03-21
cpubug is fine.
Ronald G. Minnich
2006-03-20
added definitions. added cpubug support. added object. Commented out
Ronald G. Minnich
2006-03-19
small cleanup attempt in sc520 code. there needs to be some major spring
Stefan Reinauer
2006-03-17
- sc520 updates. move PAR setup to mainboard auto.c
Stefan Reinauer
2006-03-17
fix mmcrval, small cosmetics to raminit
Stefan Reinauer
2006-02-28
remove unused GX1 asm code
Li-Ta Lo
2006-02-27
more GX2 commit
Li-Ta Lo
2006-01-28
rename
Ronald G. Minnich
2006-01-27
adding preliminary, and almost certainly wrong, rumba support.
Ronald G. Minnich
2006-01-09
don't need copy_secondary_start_to_1m_below for non-smp
Yinghai Lu
2006-01-04
1M boundary for _RAMBASE=1M, and CONFIG_LB_TOPK 8M above support
Yinghai Lu
2005-12-14
indirect jmp with *
Yinghai Lu
2005-12-14
from issue 53: don't set TOM2 if 4G less mem installed, opt for init_ecc
Yinghai Lu
2005-12-14
support HDT disassembly when cache as ram auto stage
Yinghai Lu
2005-12-14
issue 51 and 52: set mtrr for ap before stop it, and _RAMBASE above 1M
Yinghai Lu
2005-12-09
make clear_1m_ram.c to support gcc 3 and gcc4
Yinghai Lu
2005-12-07
use CONFIG_LB_MEM_TOPK instead 1M hardcode from issue 50
Yinghai Lu
2005-12-02
1201_ht_bus0_dev0_fidvid_core.diff
Stefan Reinauer
2005-12-01
Applying YhLu's patch from issue 37.
Stefan Reinauer
2005-12-01
Applying 11_26_car_tyan.diff from Yinghai Lu.
Stefan Reinauer
2005-11-26
- Apply 11_24_a_s1_core.diff from
Stefan Reinauer
2005-11-26
add another Via C3 cpu id reported by grzegorz@el-kom.pl
Stefan Reinauer
2005-11-23
remove rev f ifdef
Ronald G. Minnich
2005-11-23
CAR patch from YH LU
Ronald G. Minnich
2005-11-23
Split out microcode updates.
Ronald G. Minnich
2005-11-23
missed these.
Ronald G. Minnich
2005-11-23
issue 25, various AMD patches
Ronald G. Minnich
2005-11-22
fixed fsf address
Ronald G. Minnich
2005-11-22
EPIA-M fixup
Ronald G. Minnich
2005-11-21
This was posted on issue tracker and approve by ron minnich
Ronald G. Minnich
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