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Some coreboot project code with my work
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cpu
Age
Commit message (
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Author
2012-08-05
AMD S3: Remove the hardcoded volatile position
zbao
2012-08-04
Make the device tree available in the rom stage
Stefan Reinauer
2012-08-03
Intel CPUs: Fix counting of CPU cores
Kyösti Mälkki
2012-08-01
Intel Sandybridge: add reserved memory as resources
Kyösti Mälkki
2012-07-31
Revert "Use broadcast SIPI to startup siblings"
Sven Schnelle
2012-07-31
Revert "remove CONFIG_SERIAL_CPU_INIT"
Sven Schnelle
2012-07-26
CPU: Add option to set TCC activation offset
Duncan Laurie
2012-07-26
ACPI: Add a method to notify OS to re-read _PPC
Duncan Laurie
2012-07-26
ACPI: Add function to write _PPC using NVS
Duncan Laurie
2012-07-26
USBDEBUG: buffer up to 8 bytes
Sven Schnelle
2012-07-26
Drop CONFIG_CPU_MODEL_NAME and fix CPU name displayed in logs
Stefan Reinauer
2012-07-26
Enable Microcode in CBFS for all SandyBridge/IvyBridge systems
Stefan Reinauer
2012-07-25
SMM: Fix state table for Intel Core2 CPUs
Stefan Reinauer
2012-07-25
Fix comment to reference IvyBridge, too
Stefan Reinauer
2012-07-25
Include SandyBridge Microcode when IvyBridge is enabled
Stefan Reinauer
2012-07-25
Fix date output in Microcode update
Stefan Reinauer
2012-07-25
Fix LAPIC timer on Ivy Bridge systems
Stefan Reinauer
2012-07-24
CPU: Set flex ratio to nominal TDP ratio in bootblock
Duncan Laurie
2012-07-24
SMM: Fix state save map for sandybridge and TSEG
Duncan Laurie
2012-07-24
SMM: Add heap region and move C handler higher in region
Duncan Laurie
2012-07-24
CPU: Update ivybridge PP1 current limit value
Duncan Laurie
2012-07-24
CPU: Add basic support for Nominal Configurable TDP
Duncan Laurie
2012-07-24
Rename cache_lbmem() to cache_ramstage()
Stefan Reinauer
2012-07-24
Config changes to support microcode in CBFS
Vadim Bendebury
2012-07-24
Add microcode blob processing
Vadim Bendebury
2012-07-24
Add code to read Intel microcode from CBFS
Vadim Bendebury
2012-07-24
Make MAX_PHYSICAL_CPUS invisible on non-AMD boards
Stefan Reinauer
2012-07-24
Rename microcode include file to be model agnostic
Vadim Bendebury
2012-07-24
Properly identify ACPI C3 states in _CST table.
Duncan Laurie
2012-07-24
Remove code that enables/disables VMX in coreboot on chromebooks.
Ronald G. Minnich
2012-07-24
MTRR: drop repetetive debug message
Stefan Reinauer
2012-07-23
Re-initialize Local APIC timer on APs
Stefan Reinauer
2012-07-22
AMD CPUs: Updated CPU list in powernow_acpi.c
Jukka Rantala
2012-07-18
AMD northbridges: drop dead code
Kyösti Mälkki
2012-07-16
AMD: Fix GFXUMA with 4GB or more RAM
Kyösti Mälkki
2012-07-16
AMD MTRR: fix rounding and renames
Kyösti Mälkki
2012-07-16
Check for IORESOURCE_UMA_FB in MTRR setup
Kyösti Mälkki
2012-07-16
Define global uma_memory variables
Kyösti Mälkki
2012-07-14
Remove useless file from building.
zbao
2012-07-12
Drop Kconfig VAR_MTRR_HOLE option
Kyösti Mälkki
2012-07-12
Fix stack assignment during CPU initialization
Sven Schnelle
2012-07-05
Only copy real-mode section of SIPI vector
Kyösti Mälkki
2012-07-05
Fix the CPU index parameter passed to secondary_cpu_init().
Kyösti Mälkki
2012-07-04
Intel cpus: Extend cache to cover complete Flash Device
Kyösti Mälkki
2012-07-04
Intel model_106cx: change CAR to model_6ex
Kyösti Mälkki
2012-07-04
Intel cpus: delete dead CAR code and whitespace fixes
Kyösti Mälkki
2012-07-04
Intel cpus: use CPU_ADDR_BITS from Kconfig during CAR
Kyösti Mälkki
2012-07-03
AGESA F15 wrapper for Trinity
zbao
2012-07-02
remove CONFIG_SERIAL_CPU_INIT
Sven Schnelle
2012-07-02
Use broadcast SIPI to startup siblings
Sven Schnelle
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