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2010-02-09Allow building images with different prefixes (ie. normal/romstage,Patrick Georgi
helloWorld/romstage, ...). It defaults to fallback/, so there's no user visible change now. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5102 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-08janitor task: unify and cleanup naming.Stefan Reinauer
cache_as_ram_auto.c and auto.c are both called "romstage.c" now. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-07newconfig is no more.Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-04typoStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5085 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-04Move CAR settings for all GX1, GX2, LX and Intel Slot2 boards to the CPU.Stefan Reinauer
This automatically adds the settings for those boards that didn't have settings at all yet. Also, small fixup to compareboard. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> --> Please help porting all boards from newconfig to Kconfig <-- This is a lot of janitor work and we can use your helping hands. The sooner we can get rid of Kbuild, the better. The KBuild report on the mailing list shows the config differences between newconfig and Kconfig. In theory, all Kconfig configs should be equal to their newconfig pendant. In practice it's better to come close but stay clean. --> Please help porting all boards from newconfig to Kconfig <-- git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5082 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-26- Clean up and comment writing of MSRs for cache control (Backport from v3)Edwin Beasant
- Invalidate Cache Tags (by means of in-place rewrite of cache data) which allows CAR data to be flushed to RAM - Re-enable cache after flush of CAR to RAM Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5055 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25Fix ACPI build on a couple of boards (now that it's active)Patrick Georgi
Fix timer handling on amd/sc520 systems Match UDELAY_* configuration of newconfig in Kconfig Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5054 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25More Kconfig changes to improve match with newconfig:Patrick Georgi
DIMM_SUPPORT APIC_ID_OFFSET ACPI_SSDTX_NUM IRQ_SLOT_COUNT MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID (except msi/ms9185) MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID MEM_TRAIN_SEQ HAVE_ACPI_RESUME Also remove MMX (kconfig specific) and HAVE_MOVNTI and IOAPIC (which we deliberately differ in kconfig) from compareboard report. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-18Move all IOAPIC selection to southbridges, and remove themPatrick Georgi
from mainboards. Some adaptations were necessary after the IOAPIC cleanup, so this should fix the build. Fix intel/d945gclf build, which was missing some ACPI component. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5039 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16Make internal functions static in speedstep ACPI generation code.Stefan Reinauer
(trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5014 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16Fix stack base for Atom CPUs, the resume mechanism (cbmem etc) expects this.Stefan Reinauer
This unifies the base with Core and Core 2 CPUs. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5013 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16Micro-optimization: movl $0 --> xorl.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5012 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16new microcode for Intel Core 2(tm) CPUsStefan Reinauer
(taken from Intel's Linux microcode release) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5011 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-11Make qemu use the udelay function in src/pc80/udelay_io.cPatrick Georgi
instead of the equivalent copy in src/cpu/emulation/qemu-x86/northbridge.c. Also, delete the copy. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5006 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-06Kconfig builds all boards now.Patrick Georgi
This patch also aligns the configuration of a couple of boards more closely to what newconfig does. Also, the romstrap inc/lds files are declared in the Makefiles of the southbridges they belong to, instead of some global file. AMD CPUs have their own timer functions, so disable UDELAY_IO for them and set HAVE_INIT_TIMER as appropriate, same for emulation/qemu-x86. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5000 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-05- Let AMD CAR code pick the right XIP areaRudolf Marek
for tinybootblock - move asus/m2v-mx_se to tinybootblock - Add romstrap for via southbridge to tinybootblock-bootblock Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4999 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-04- Fix UDELAY options and HAVE_INIT_TIMER [kconfig]Patrick Georgi
(defaults to UDELAY_IO again, like newconfig) - Use UDELAY_TSC on Via C7 [kconfig] - Support Tinybootblock on Intel CPUs - set XIP location correctly for Tinybootblock on Intel - provide correct XIP location in Tinybootblock configuration - Make kontron/986lcd-m use Tinybootblock - Some kconfig fixes to kontron/986lcd-m [kconfig] Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-04- use LAPIC timer if selected (instead of TSC all the time) [kconfig]Patrick Georgi
- uncomment commented out intel socket [kconfig] - HAVE_MOVNTI is a property of the cpu [kconfig] Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4996 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-31romcc:Patrick Georgi
- Set __PRE_RAM__ define per default - Properly handle ignored (#ifdef'd out) #include lines amd/serengeti_cheetah_fam10: - write ACPI files to $(obj) instead of the top dir (alias $(CURDIR)) tinybootblock: - provide a way to define code that should be added to the bootblock, to map the entire ROM for use by CBFS amd/model_fxx, amd/model_10xxx: - add CONFIG_SSE walkcbfs.S: - eliminate the use of two registers, to make space for romcc to wiggle amd/serengeti_cheetah_fam10: - use the enable_rom framework. not entirely functional yet Boot-tested on emulation/qemu-x86 Build-tested on amd/serengeti_cheetah_fam10 amd/serengeti_cheetah_fam10 fails in amdht/ somewhere, but builds Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4994 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-23Tiny Bootblock, step 1/n.Patrick Georgi
Introduce the tiny bootblock infrastructure and use it on QEmu. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4989 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-21Make coreboot load VSA from CBFS on amd/gx2.Patrick Georgi
You have to convert the VSA bios image to ELF using the following commands (assuming i386/32bit binutils, if in doubt, use crossgcc's i386-elf-* tools): objcopy --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 vsa.binary vsa.o ld -e 0x60020 --section-start .data=0x60000 vsa.o -o vsa.elf Then, after build, use cbfstool coreboot.rom add-stage vsa.elf vsa l to add it to the image. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4986 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-10Push VSA into CBFS for amd/lx systems. It's not hooked up toPatrick Georgi
the build system yet, so some additional steps are necessary. It's not that bad, given that the code didn't work before. You have to convert the VSA bios image to ELF using the following commands (assuming i386/32bit binutils, if in doubt, use crossgcc's i386-elf-* tools): objcopy --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 vsa.binary vsa.o ld -e 0x60020 --section-start .data=0x60000 vsa.o -o vsa.elf Then, after build, use cbfstool coreboot.rom add-stage vsa.elf vsa l to add it to the image. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4976 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-02Trivial fix for kconfig socket 441 (typo was 411) so that d945gclf builds.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4973 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-01Atom only supports 32bit MTRRs (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4970 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-17Silence two warnings. Only use the Qemu hard-coded address for VGA devices.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4947 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-13Complete the Kconfig of socket_AM2r2.Zheng Bao
This patch is from socket_F_1207, even though the fam10 can not be "make menuconfig"ed currently. Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-12Add CONFIG_WARNINGS_ARE_ERRORS and set it for qemu.Myles Watson
Remove all remaining warnings from qemu. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4939 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-06Split the two usages of __ROMCC__:Myles Watson
__ROMCC__ now means "Don't use prototypes, since romcc doesn't support them." __PRE_RAM__ means "Use simpler versions of functions, and no device tree." There are probably some places where both are tested, but only one is needed. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-04Fix up typo in Socket 441 CPUs, and add a few (trivial) Kconfig files for them.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4908 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-03Some fixes.Patrick Georgi
Atom does not like 36bit MTRRs in CAR setup. Enable XIP setup again (works with 32bit MTRRs) Keep code more similar to 6ex code.. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4907 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-30Remove some warnings from the tyan s2895.Myles Watson
Declare superio functions to be static and remove duplicates. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4890 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-28Make d945gclf build.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-28Add some missing license headers, consistency fixes for others (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4881 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-28preliminary Intel D945GCLF Atom+i945 support.Stefan Reinauer
ram init fails, as the i945 driver currently only supports the mobile version of the chipset.. Not sure how much sense it makes to check this in, but since it's a nice and cheap board, maybe someone wants to work on this. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4879 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-27Remove redundant declarations. Trivial.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4873 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-27Add $(obj) paths for a couple of smm files so they don't end up in the top ↵Myles Watson
directory. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4872 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26Remove double include of smm directory. Trivial.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4864 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26CBMEM high table memory manager.Stefan Reinauer
This code adds a very simple toc based memory manager for the high tables area. The purpose of this code is to make it simpler and more reliable to find certain data structures in memory. This will also make it possible to have ACPI S3 Resume working without an ugly hole at 31MB. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26intel core and core 2:Stefan Reinauer
- small preprocessor fix - leave some space in the CAR area for the usbdebug structure if usbdebug is used Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4859 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26Define some variables that were not defined. There are a couple left.Myles Watson
Do kbuildall then grep not.defined kbuildall.results/* The interesting ones were GENERATE_* I had to put them in twice to make it work correctly: once outside the menu setting the defaults, and once inside the menu. Now they show up when they should, and are always defined Define HAVE_INIT_TIMER to only exclude the three boards that define it to be 0 in newconfig. Define MEM_TRAIN_SEQ to be an integer and set it correctly. Remove CAR_FAM10 and just depend on NORTHBRIDGE_AMD_AMDFAM10 MOVNTI is a performance enhancement, and should default to 0 so it doesn't break boards that forget to define it. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-24Fix kconfig build error due to "source"ing a non-existant file (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4850 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-24Change QEMU CPU Makefile.inc files to match other CPUs.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4848 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-24hook up missing x86 SMM into Makefile Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4846 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-24drop support for various (old) PPC CPUs as per discussion from 9/10/9Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4845 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-24Some ACPI implementations don't like to see full paths within a scope forStefan Reinauer
CPU power management, so don't add the scope name Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4843 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-24* refactor x86 smi handler (put all debug stuff in an extra file smiutil.c)Stefan Reinauer
* lock other CPUs in SMI handler while one CPU is handling an SMI. Without this various racing scenarios could happen. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4840 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-24First attempt to integrate SMM in Kconfig. Unused code so farStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4833 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-23New revision guide September 2009 3.46Rudolf Marek
Lets add some more CPUs. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-23drop a lot of dead code, including an old winbond southbridge from our removedStefan Reinauer
ppc port, some ambiguous use of CONFIG_IDE and an unused ide driver (we dropped the filesystems already to be used with it) (somewhat trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4828 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-23White space and comment fixes for cache_as_ram.inc files so it's easier to spotMyles Watson
differences. Trivial. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4827 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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