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coreboot
2560p
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broadwell_refcode
e6230
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haswell-mrc
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Some coreboot project code with my work
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Age
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Author
2016-10-01
cpu/amd/model_fxx: transition away from device_t
Antonello Dettori
2016-09-13
cpu/amd/family_10h-family_15h: transition away from device_t
Antonello Dettori
2016-09-12
cpu/x86: Move fls() and fms() to mtrr.h
Rizwan Qureshi
2016-09-08
Kconfig: Add option for microcode filenames
Martin Roth
2016-09-04
src/cpu: Improve code formatting
Elyes HAOUAS
2016-08-28
src/cpu: Add required space before opening parenthesis '('
Elyes HAOUAS
2016-08-28
src/cpu: Remove unnecessary whitespace before "\n"
Elyes HAOUAS
2016-08-23
src/cpu: Capitalize CPU, APIC and IOAPIC typo fix
Elyes HAOUAS
2016-08-18
Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS
Aaron Durbin
2016-08-18
Kconfig: lay groundwork for not assuming SPI flash boot device
Aaron Durbin
2016-08-14
cpu/ti/am355x: Fix array overrun
Paul Menzel
2016-08-01
Remove non-ascii & unprintable characters
Martin Roth
2016-07-31
src/cpu: Capitalize CPU
Elyes HAOUAS
2016-07-31
src/cpu: Capitalize ROM and RAM
Elyes HAOUAS
2016-07-27
cpu/x86: Support CPUs without rdmsr/wrmsr instructions
Lee Leahy
2016-07-26
intel car: Use MTRR WRPROT type for XIP cache
Kyösti Mälkki
2016-07-26
intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE
Kyösti Mälkki
2016-07-23
intel/haswell: Remove useless MTRR clear
Kyösti Mälkki
2016-07-23
intel/haswell post-car: Minor fix on MTRR setting
Kyösti Mälkki
2016-07-23
intel/haswell: Add asmlinkage for romstage_after_car()
Kyösti Mälkki
2016-07-22
cpu/x86/mtrr: correct variable MTRR calculation around 1MiB boundary
Aaron Durbin
2016-07-22
intel car: Unify postcodes
Kyösti Mälkki
2016-07-22
intel car: Unify whitespace and comment fixes
Kyösti Mälkki
2016-07-22
intel car: Remove guard on XIP_ROM_SIZE
Kyösti Mälkki
2016-07-22
intel model_106cx: Include CAR from socket directory
Kyösti Mälkki
2016-07-21
AMD k8 fam10: Fix CAR GLOBALS late in romstage
Kyösti Mälkki
2016-07-15
AMD binaryPI: Use common romstage ram stack
Kyösti Mälkki
2016-07-15
AMD binaryPI: Split romstage ram stack
Kyösti Mälkki
2016-07-15
AMD binaryPI: Use common ACPI S3 recovery
Kyösti Mälkki
2016-07-15
AGESA: Use common romstage ram stack
Kyösti Mälkki
2016-07-15
AGESA: Use common ACPI S3 recovery
Kyösti Mälkki
2016-07-10
intel post-car: Consolidate choose_top_of_stack()
Kyösti Mälkki
2016-07-10
AMD k8 fam10: Drop excessive spinlock initialization
Kyösti Mälkki
2016-07-10
AMD k8 fam10: Fix romstage handoff
Kyösti Mälkki
2016-06-29
AMD k8 fam10: Refactor S3 recovery
Kyösti Mälkki
2016-06-29
intel/haswell: No need for ACPI S3 resume backup
Kyösti Mälkki
2016-06-29
intel romstage: Use run_ramstage()
Kyösti Mälkki
2016-06-24
region: Add writeat and eraseat support
Antonello Dettori
2016-06-22
ACPI S3: Add common recovery code
Kyösti Mälkki
2016-06-22
ACPI S3: Move SMP trampoline recovery
Kyösti Mälkki
2016-06-22
Ignore RAMTOP for MTRRs
Kyösti Mälkki
2016-06-22
intel/model_206ax: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-06-22
intel/model_2065x: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-06-22
intel cache-as-ram: Fix comment about MTRRs
Kyösti Mälkki
2016-06-21
intel/model_6ex: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-06-21
intel/car/cache_as_ram_ht.inc: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-06-21
intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-06-20
amd/fam_10h-fam_15h: allow building without microcode updates
Arthur Heymans
2016-06-20
amd/geode: Fix comment about ACPI S3
Kyösti Mälkki
2016-06-20
VIA C7 NANO: Fix early MTRR setting
Kyösti Mälkki
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