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path: root/src/cpu
AgeCommit message (Expand)Author
2018-08-17intel/socket_mPGA604: Keep only model f2xKyösti Mälkki
2018-08-13src: Get rid of non-local header treated as localElyes HAOUAS
2018-08-13cpu/intel/car: Align the stack to 16 bytes before romstage_mainArthur Heymans
2018-08-13cpu/x86/smm/smm_module_loader.c: Avoid static analysis error "unused value"Richard Spiegel
2018-08-09cpu/x86/mp_init.c: Avoid static analysis error for unused valueRichard Spiegel
2018-08-09src/cpu: Fix typoElyes HAOUAS
2018-08-09cpu/x86/mp_init.c: Fix error treatmentRichard Spiegel
2018-08-09cpu/intel/smm: Make sure SMRR base is aligned to SMRR sizeArthur Heymans
2018-08-08cpu/amd: Correct number of MCA banks clearedMarshall Dawson
2018-08-08cpu/amd: Improve formattingMarshall Dawson
2018-08-08cpu/amd: Rename MCA status registerMarshall Dawson
2018-08-06mp_init: fix typoRaul E Rangel
2018-08-03cpu/x86/lapic/apic_timer.c: Compile the same code for all stagesArthur Heymans
2018-07-30nb/intel/gm45: Use common code for SMM in TSEGArthur Heymans
2018-07-30cpu/intel/smm/gen1: Use correct MSR for model_6fx and model_1067xArthur Heymans
2018-07-30cpu/intel/microcode: Add helper functions to get microcode infoRizwan Qureshi
2018-07-28nb/intel/sandybridge: Move CPU report to cpu folderPatrick Rudolph
2018-07-28intel/sandybridge: Don't hardcode platform typePatrick Rudolph
2018-07-25drivers/tpm: Add TPM ramstage driver for devices without vboot.Philipp Deppenwiese
2018-07-24cpu/x86/mtrr.h: Rename MSR SMRR_PHYS_x to IA32_SMRR_PHYSxArthur Heymans
2018-07-09src/{arch,commonlib,cpu}: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS
2018-06-28smm: Add canary to end of stack and die() if a stack overflow occursRaul E Rangel
2018-06-27smm: Switch from %edx to %ebxRaul E Rangel
2018-06-27smm: Push a null stack base pointerRaul E Rangel
2018-06-27smm: Make local variables relative to ebpRaul E Rangel
2018-06-27smm: Clear SMRAM when debuggingRaul E Rangel
2018-06-27cpu/intel/p4-netburst: skip caching rom on model_fxxArthur Heymans
2018-06-27x86/car: Replace reference of copy_and_run locationKyösti Mälkki
2018-06-21Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location"Arthur Heymans
2018-06-17nb/intel/i440bx: Switch to POSTCAR_STAGEKyösti Mälkki
2018-06-17cpu/intel/car/p3: Use variable MTRR countKyösti Mälkki
2018-06-17cpu/intel/slot_1: Switch to different CAR setupKyösti Mälkki
2018-06-17cpu/intel/car: Remove obsolete filesKyösti Mälkki
2018-06-14cpu/intel/haswell: Use the common intel romstage_main functionArthur Heymans
2018-06-14cpu/amd: Remove duplicated includesElyes HAOUAS
2018-06-14cpu/x86: Make SMM stack size configurableRaul E Rangel
2018-06-06arch/x86: Always select RELOCATABLE_MODULESKyösti Mälkki
2018-06-06arch/x86: Make RELOCATABLE_RAMSTAGE the defaultKyösti Mälkki
2018-06-06arch/x86: Drop leftover ROMCC supportKyösti Mälkki
2018-06-06cpu/intel/model_{6xx,f2x,f3x,f4x}: Remove unneeded includeElyes HAOUAS
2018-06-05amd/geode_lx: Fix .c includesKyösti Mälkki
2018-06-05cpu/intel/haswell: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05cpu/intel/model_2065x: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05cpu/intel/model_206ax: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05cpu/intel/car/non-evict: Improve a few thingsArthur Heymans
2018-06-05cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE supportArthur Heymans
2018-06-05nb/intel/gm45: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05nb/intel/x4x: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05nb/intel/pineview: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05nb/intel/i945: Switch to POSTCAR_STAGEArthur Heymans
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