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coreboot
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broadwell_refcode
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Some coreboot project code with my work
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Age
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Author
2014-07-14
AGESA CIMx: Move late init out of get_bus_conf()
Kyösti Mälkki
2014-07-14
AGESA: Trace execution with AGESAWRAPPER()
Kyösti Mälkki
2014-07-14
AMD SPI: Optimise for longer writes
Kyösti Mälkki
2014-07-11
src: Make use of 'CEIL_DIV(a, b)' macro across tree
Edward O'Callaghan
2014-07-10
intel/haswell: add vmx support w/Kconfig option
Matt DeVillier
2014-07-08
cpu: Trivial - drop trailing blank lines at EOF
Edward O'Callaghan
2014-07-05
spi: Change spi_xfer to work in units of bytes instead of bits.
Gabe Black
2014-07-05
spi: Remove unused parameters from spi_flash_probe and setup_spi_slave.
Gabe Black
2014-07-05
Drop redundant select CACHE_AS_RAM
Kyösti Mälkki
2014-07-05
intel: Make monotonic timer a first class citizen
Edward O'Callaghan
2014-07-03
AGESA: Call get_bus_conf() just once
Kyösti Mälkki
2014-07-03
AGESA: Add agesawrapper_post_device()
Kyösti Mälkki
2014-07-03
AGESA boards: Use acpi_s3_resume_allowed()
Kyösti Mälkki
2014-07-03
AGESA: Clean separation of SPI flash
Kyösti Mälkki
2014-07-03
AGESA boards: Add prepare_for_resume()
Kyösti Mälkki
2014-07-03
AGESA S3: Refactor S3 backup store locations in SPI
Kyösti Mälkki
2014-06-30
x86 MTRR: Drop unused return value
Kyösti Mälkki
2014-06-30
Use MTRR defines
Kyösti Mälkki
2014-06-29
cpu/x86/pae/pgtbl.c: Unsigned comparison < 0 always false
Edward O'Callaghan
2014-06-29
cpu/amd/geode_gx2/cache_as_ram.inc: Remove illegal ASCII art
Edward O'Callaghan
2014-06-28
Don't add .eh_frame sections to SMM image
Patrick Georgi
2014-06-25
AGESA: Move config parameters for non-volatile S3 data
Kyösti Mälkki
2014-06-25
Declare acpi_is_wakeup_early() only once
Kyösti Mälkki
2014-06-21
cpu/amd/agesa: Use acpi_is_wakeup()
Kyösti Mälkki
2014-06-21
Misc: Use acpi_is_wakeup_s3()
Kyösti Mälkki
2014-06-17
intel/model_2065x: Add 20652 microcode.
Vladimir Serbinenko
2014-06-06
AGESA: Use common heap allocator
Kyösti Mälkki
2014-05-30
cpu/intel/fsp_model_206ax: change realpath to readlink
Martin Roth
2014-05-19
build: use CFLAGS_* in more places where they're needed
Patrick Georgi
2014-05-17
build: separate CPPFLAGS from CFLAGS
Patrick Georgi
2014-05-17
build: CPPFLAGS is more common than INCLUDES
Patrick Georgi
2014-05-13
cpu/intel: Add CPU socket rPGA988B
Zaolin
2014-05-10
Replace SERIAL_CPU_INIT with PARALLEL_CPU_INIT
Kyösti Mälkki
2014-05-09
cougar_canyon2: Switch CPU/NB/SB to the shared FSP code
Martin Roth
2014-05-09
Intel FSP: add a shared set of functions for the FSP
Martin Roth
2014-05-06
Introduce stage-specific architecture for coreboot
Furquan Shaikh
2014-05-05
haswell: move to mp_init library
Aaron Durbin
2014-05-03
Move ARCH_* from board/Kconfig to cpu or soc Kconfig.
Furquan Shaikh
2014-04-30
console: Move UART port defaults to mainboard
Kyösti Mälkki
2014-04-30
console: Drop EARLY_CONSOLE option
Kyösti Mälkki
2014-04-30
allwinner/a10: Hide SoC specific UART functions
Kyösti Mälkki
2014-04-30
uart: Support multiple ports
Kyösti Mälkki
2014-04-29
AGESA SPI: Fix Kconfig options
Kyösti Mälkki
2014-04-28
AMD: Add common header file for CAR setup
Kyösti Mälkki
2014-04-26
Rename coreboot_ram stage to ramstage
Furquan Shaikh
2014-04-26
Get rid of HAVE_INIT_TIMER config option
Furquan Shaikh
2014-04-20
Move MAX_PHYSICAL_CPUS to AMD k8 and fam10
Kyösti Mälkki
2014-04-18
console: Use romstage code for ramstage and SMM
Kyösti Mälkki
2014-04-16
cpu/amd/agesa/family15tn: Add udelay implementation for SMM
Alexandru Gagniuc
2014-04-16
cpu/amd/agesa/family15tn: Add initial support for SMM mode
Alexandru Gagniuc
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