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path: root/src/cpu
AgeCommit message (Expand)Author
2010-08-30We call this cache as ram everywhere, so let's call it the same in KconfigStefan Reinauer
2010-08-30mPGA479M Sockets can take Intel Mobile Celeron.Andreas Schultz
2010-08-22I've checked Revision Guide for AMD Family10h processors (#41322) revXavi Drudis Ferran
2010-08-22RB_C3 should also apply the workaround for errata 354, according toXavi Drudis Ferran
2010-08-22RB_C3 and HY-D0 should also apply the workaround for errata 344, according toXavi Drudis Ferran
2010-08-22Complete code for errata 343. Revision Guide for AMD Family10hXavi Drudis Ferran
2010-08-22Include RB_C3 in erratum 346Xavi Drudis Ferran
2010-08-22Add RB_C3 to AMD_FAM10_ALL so that it gets its MSR right for mtrs, ht, etc.Xavi Drudis Ferran
2010-08-14My forgotten CAR cleanup patch...Stefan Reinauer
2010-08-14clean up comment in entry32.incStefan Reinauer
2010-08-03Drop the USE_PRINTK_IN_CAR option. It's a bogus decision to make for any user /Stefan Reinauer
2010-08-01make early_mtrr_init() invisible for cache as ram targets as it breaks them.Stefan Reinauer
2010-08-01- fix SMM code relocation raceStefan Reinauer
2010-07-27Add src/cpu/amd/model_gx2/cache_as_ram.inc missing from r5669Nils Jacobs
2010-07-26This patch converts the Geode GX2 boards to CAR.Nils Jacobs
2010-07-08Fix all warnings in the tree Stefan Reinauer
2010-07-08get rid of even more fam10 and k8 warnings.Stefan Reinauer
2010-07-07fix some more warningsStefan Reinauer
2010-07-06Re-integrate "USE_OPTION_TABLE" code.Edwin Beasant
2010-06-21This patch adds support for the Intel D810E2CB (i810e/ICH2) desktop board. Hu...Joseph Smith
2010-06-21Create new socket for FCPGA370 and PGA370 CPU's for CAR. Add CAR support for ...Joseph Smith
2010-06-10This commit updates the Geode LX GLCP delay control setup from the v2 way to ...Edwin Beasant
2010-06-09Same conversion as with resources from static arrays to lists, exceptMyles Watson
2010-06-07replace outb -> port 0x80 with post_code() in some places.Stefan Reinauer
2010-06-04This patch replaces the headers of the following files:Frank Vibrans
2010-05-30don't generate C source code file but use objcopy to include the SMM blob.Stefan Reinauer
2010-05-28Add Intel Atom microcodeStefan Reinauer
2010-05-26Update Intel microcode include files from their web page.Stefan Reinauer
2010-05-26Use the microcode files as created by the new microcode update script. (Fixes...Stefan Reinauer
2010-05-26Drop problematically licensed Intel microcode filesStefan Reinauer
2010-05-26cosmetical changes on intel's microcode.cStefan Reinauer
2010-05-25also rename the config option.Stefan Reinauer
2010-05-25Long ago we agreed on kicking the _direct appendix because everything inStefan Reinauer
2010-05-21Get rid of this warning:Myles Watson
2010-05-16Following patch reworks car_disable into C. Tested, works here. I comparedRudolf Marek
2010-05-14Remove another set of includes from Fam10 romstages:Patrick Georgi
2010-05-14license header fixes Nils Jacobs
2010-05-09Move includes to where they are needed. This allows to simplifyPatrick Georgi
2010-04-27Enable the cache before initializing the processor name, like model_10 does.Myles Watson
2010-04-27Since some people disapprove of white space cleanups mixed in regular commitsStefan Reinauer
2010-04-26I meant SSE. Reported by Dustin Harrison.Myles Watson
2010-04-26Enable SSE2 for ep80579. Reported by Dustin Harrison.Myles Watson
2010-04-25a single place for the romstage stack for copy_and_run.Stefan Reinauer
2010-04-25drop "arch/asm.h" and "arch/intel.h" and create "cpu/x86/post_code.h"Stefan Reinauer
2010-04-24these cpus are explicitly supported by model_6bxStefan Reinauer
2010-04-23AMD Socket ASB2 and AM3 support.Zheng Bao
2010-04-22fix ARRAY_SIZE issue.Stefan Reinauer
2010-04-21oops, sorry for the last commit. This commit changes the code to distinguishStefan Reinauer
2010-04-21* clean up all but two warnings on artecgroup dbe61Stefan Reinauer
2010-04-20Make VSA code selectable in KconfigStefan Reinauer
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