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AgeCommit message (Expand)Author
2012-11-28Add .h files for samsung exynos 5250Ronald G. Minnich
2012-11-28amdk8/amdfam10: Use CAR_GLOBAL for sysinfoPatrick Georgi
2012-11-27Remove AMD special case for LAPIC based udelay()Patrick Georgi
2012-11-27Get rid of drivers classPatrick Georgi
2012-11-27intel/i82801ix: new southbridge, ICH9Patrick Georgi
2012-11-20Unify use of bool config variablesStefan Reinauer
2012-11-20secondary.S: Fix dropping ramstage.aStefan Reinauer
2012-11-20Make sure only one udelay function is availableStefan Reinauer
2012-11-16Clean up KconfigStefan Reinauer
2012-11-13Add spinlock to serialize Intel microcode updatesStefan Reinauer
2012-11-13Clean up stack checking codeStefan Reinauer
2012-11-13clean up lapic_cpu_init.cStefan Reinauer
2012-11-13Pass the CPU index as a parameter to startup.Ronald G. Minnich
2012-11-13Fix CONFIG_MAX_CPU set to 1 CPU build problemStefan Reinauer
2012-11-13Support better tracking of AP stack usage.Ronald G. Minnich
2012-11-12ivybridge: Catch unknown CPU revisionsStefan Reinauer
2012-11-12Fix gcc-4.7 building problem.Han Shen
2012-11-12Initialize the VMX MSRMarc Jones
2012-11-12Revert "Remove code that enables/disables VMX in coreboot on chromebooks."Marc Jones
2012-11-12sandybridge: Correct reporting of cores and threadsStefan Reinauer
2012-11-07Leave power control registers unlockedSameer Nanda
2012-11-06cpu/intel/model_1067x: Add proper c-state/p-state/thermal supportNico Huber
2012-11-06intel/socket_BGA956: enable speedstep, CAR, MMX, SSEPatrick Georgi
2012-11-05Overhaul speedstep codeNico Huber
2012-11-05Fix some indentation flaws and break very long linesNico Huber
2012-11-02AMD agesa: add enable cache at the end of disable_cache_as_ramSiyuan Wang
2012-11-02Correct FSB reading in speedstep ACPINico Huber
2012-11-01Merge cpu/intel/acpi.h into cpu/intel/speedstep.hNico Huber
2012-10-30Add support for socket LGA775Stefan Tauner
2012-10-07Fix typo in mPGA603 socketKyösti Mälkki
2012-10-07Remove chip.h files without config structureKyösti Mälkki
2012-09-19C32 legacy code: change CONFIG_CPU_AMD_SOCKET_C32 to CONFIG_CPU_AMD_SOCKET_C3...Siyuan Wang
2012-09-05VIA Nano: Add support for VIA Nano CPUsAlexandru Gagniuc
2012-09-05buildsystem: Make CPU microcode updating more configurableAlexandru Gagniuc
2012-08-27Intel model_106cx: change CAR to HT-capableKyösti Mälkki
2012-08-22Auto-declare chip_operationsKyösti Mälkki
2012-08-09Replicate TOP_MEM and TOP_MEM2 from BSP to AP CPUKyösti Mälkki
2012-08-09AMD northbridge: copy TOP_MEM and TOP_MEM2 for distributionKyösti Mälkki
2012-08-09Synchronize rdtsc instructionsStefan Reinauer
2012-08-07Move cpus_ready_for_init() to AMD K8Kyösti Mälkki
2012-08-05AMD S3: Remove the hardcoded volatile positionzbao
2012-08-04Make the device tree available in the rom stageStefan Reinauer
2012-08-03Intel CPUs: Fix counting of CPU coresKyösti Mälkki
2012-08-01Intel Sandybridge: add reserved memory as resourcesKyösti Mälkki
2012-07-31Revert "Use broadcast SIPI to startup siblings"Sven Schnelle
2012-07-31Revert "remove CONFIG_SERIAL_CPU_INIT"Sven Schnelle
2012-07-26CPU: Add option to set TCC activation offsetDuncan Laurie
2012-07-26ACPI: Add a method to notify OS to re-read _PPCDuncan Laurie
2012-07-26ACPI: Add function to write _PPC using NVSDuncan Laurie
2012-07-26USBDEBUG: buffer up to 8 bytesSven Schnelle