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AgeCommit message (Expand)Author
2011-08-06Update AMD F14 Agesa to support Rev C0 cpusefdesign98
2011-08-04cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs.Keith Hui
2011-07-22Add SSE3 dependent codeefdesign98
2011-07-22Update AMD SR5650 and SB700efdesign98
2011-07-18Add AMD Family 10 support to cpu folderefdesign98
2011-07-13Make AMD SMM SMP awareRudolf Marek
2011-07-04Small SMM fixupsRudolf Marek
2011-06-28Addition of Family12/SB900 wrapper codeefdesign98
2011-06-22Move existing AMD Ffamily14 code to f14 folderefdesign98
2011-06-22Rename {CPU|NB|SB}/amd/*_wrapper foldersefdesign98
2011-06-18SMM: flush caches after disabling cachingSven Schnelle
2011-06-15SMM: don't overwrite SMM memory on resumeSven Schnelle
2011-05-15Cosmetic cleanup.Scott Duplichan
2011-05-15Correct the number of MCA error reporting banks cleared.Scott Duplichan
2011-05-151) Initialize BSP fixed MTRRs to match AP fixed MTRR initialization.Scott Duplichan
2011-05-10Change read_option() to a macro that wraps some API uglynessPatrick Georgi
2011-05-10This replaces the fixed shift values in the apic timer init with macros.Vikram Narayanan
2011-05-03Enable caching for ROM area in model_6ex/cache_as_ram.incSven Schnelle
2011-04-26Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as anStefan Reinauer
2011-04-21more ifdef -> if fixes.Stefan Reinauer
2011-04-21more ifdef -> if fixesStefan Reinauer
2011-04-19Fix some more misuses of ifdef/if definedStefan Reinauer
2011-04-14drop half an uart8250 implementation from smiutil and use the common code Stefan Reinauer
2011-04-14earlymtrr.c: wipe some dead code, use names instead of numbers and someStefan Reinauer
2011-04-14drop incorrectly used CONFIG_ROM_IMAGE_SIZE and unused CONFIG_ARCHStefan Reinauer
2011-04-14Use symbolic names for some MTRR bits instead of numbers in CAR codeStefan Reinauer
2011-04-11Unify use of post_codeAlexandru Gagniuc
2011-03-28Add AMD C32 support.Zheng Bao
2011-03-17Fix breaking the build after removing files in tthe previous checkin. Marc Jones
2011-03-04Add P-states for select Socket 754 processors.Jonathan Kollasch
2011-03-03Correct off-by-one problem in AMD pre-rev-F model-F PowerNow code.Jonathan Kollasch
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
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