| Age | Commit message (Expand) | Author |
|---|
| 2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-26 | Make AMD Fam10h CPU microcode updates optional in Expert mode | Xavi Drudis Ferran |
| 2011-02-26 | It adds support for automatic PSS object generation for AMD pre fam Fh CPU. T... | Rudolf Marek |
| 2011-02-24 | Add compile-time defaults to some K8 CMOS options in case they're absent in CMOS | Josef Kellermann |
| 2011-02-14 | Add AMD cpu wrapper code. Patch 4 of 8. | Frank Vibrans |
| 2011-02-10 | According to AMD documentation, cache type WP should be used for | Scott Duplichan |
| 2011-02-10 | Implemented workaround for erratum 169, obsoleting erratum 131. | Alexandru Gagniuc |
| 2011-02-10 | Fix a potential system hang by handling AMD Model F Erratum 89 | Josef Kellermann |
| 2011-01-27 | oops. this is weird. CAR addresses should be specified in the socket and not in | Stefan Reinauer |
| 2011-01-19 | Revert r5902 to make code more readable again. At least three people like to | Stefan Reinauer |
| 2011-01-19 | Now that the VIA code is run above 1Meg (like other boards), it should | Kevin O'Connor |
| 2011-01-12 | drop unused files | Stefan Reinauer |
| 2011-01-01 | Add AMD SB800 southbridge CIMx code. | Kerry She |
| 2010-12-30 | Remove duplicated GX2 processor IIOC mode setting on CS5535 southbridge code | Nils Jacobs |
| 2010-12-26 | Remove dead and unused Geode GX2 code | Nils Jacobs |
| 2010-12-26 | Replace Geode GX2 MSR addresses for GLCP on GLIU1 with names | Nils Jacobs |
| 2010-12-26 | Clean up Geode GX2 comments, whitespace and coding style. Trivial. | Nils Jacobs |
| 2010-12-18 | SMM on AMD K8 Part 2/2 | Rudolf Marek |
| 2010-12-18 | SMM for AMD K8 Part 1/2 | Stefan Reinauer |
| 2010-12-18 | Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 board | Patrick Georgi |
| 2010-12-16 | - Fix shortcoming in Kconfig when handling multiple "choice"s | Stefan Reinauer |
| 2010-12-12 | fix model 106cx | Stefan Reinauer |
| 2010-12-11 | factor out cpu power management base into a separate file. And fix a bug in | Stefan Reinauer |
| 2010-12-11 | After this has been brought up many times before, rename src/arch/i386 to | Stefan Reinauer |
| 2010-12-08 | These empty files sneaked in from another patch and shouldn't have been inclu... | Tobias Diedrich |
| 2010-12-08 | Tobias Diedrich wrote: | Tobias Diedrich |
| 2010-12-08 | Move "select CACHE_AS_RAM" lines from boards into CPU socket. | Uwe Hermann |
| 2010-11-22 | 1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_AC... | Rudolf Marek |
| 2010-11-22 | Printing coreboot debug messages on VGA console is pretty much useless, since | Stefan Reinauer |
| 2010-11-18 | Eliminate SET_NB_CFG_54 option. There was no board that | Patrick Georgi |
| 2010-11-17 | Move Intel power management related defines to some central location. | Patrick Georgi |
| 2010-11-16 | Move the SET_FIDVID* family of configuration options to Kconfig and | Patrick Georgi |
| 2010-11-13 | MTRR related improvements for AMD family 10h and family 0Fh systems | Scott Duplichan |
| 2010-11-09 | This fixes a FIXME in src/cpu/amd/mtrr/amd_mtrr.c and shuts up the | Tobias Diedrich |
| 2010-11-03 | Clean up some more comments and white space in model_gx2/cpureginit.c. | Nils Jacobs |
| 2010-10-31 | Fix AMD family 10h engineering sample is reported as 'thermal test kit'. | Scott Duplichan |
| 2010-10-26 | reg is only used inside the #if clause, so declare it there. trivial. | Patrick Georgi |
| 2010-10-20 | Now that no boards set RAMBASE < 1M, get rid of some dead code. Trivial. | Myles Watson |
| 2010-10-19 | For AMD family 10h processors, msr c0010058 is always programmed | Scott Duplichan |
| 2010-10-19 | Modernize socket_754 Kconfig with CAR and address bits information. | Jonathan Kollasch |
| 2010-10-19 | Revision 5966 changed the end of line style of the 3 modified files. This cha... | Scott Duplichan |
| 2010-10-19 | To reduce boot time, remove the double startup IPI and 10 ms delay from lapic... | Scott Duplichan |
| 2010-10-19 | When debug logging is enabled, a message such as '* AP 02 timed out:02010501' | Scott Duplichan |
| 2010-10-18 | update intel microcode files. | Stefan Reinauer |
| 2010-10-18 | Make update-microcodes.sh executable. | Uwe Hermann |
| 2010-10-17 | update intel microcode update script | Stefan Reinauer |
| 2010-10-17 | Removes model_65x CPUIDs from model_6xx code. | Keith Hui |
| 2010-10-16 | Move support for Deschutes Slot 1 CPUs (model_65x) into its own directory. | Keith Hui |
