coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-11-10	cpu/x86/mtrr.h: Rename CORE2 alternative SMRR registers	Arthur Heymans
2020-11-10	sec/intel/cbnt: Stitch in ACMs in the coreboot image	Arthur Heymans
2020-11-09	cpu/intel/model_206ax: Get CPU frequencies for SMBIOS type 4	Michał Żygowski
2020-11-09	cpu/x86/smm: Add a common save state handling	Arthur Heymans
2020-11-09	cpu/x86/smm/smm.ld: Assert that CONFIG_MAX_CPUS <= 4	Arthur Heymans
2020-11-09	cpu/x86/smm/smihandler.c: Simplify smm revision handling	Arthur Heymans
2020-11-03	cpu/intel/haswell: Move smmrelocate.c MSR definitions to header	Angel Pons
2020-11-03	cpu/x86/mp_init: Add support for x86_64	Patrick Rudolph
2020-11-02	cpu/intel/car/non-evict/cache_as_ram.S: Add support for longmode	Patrick Rudolph
2020-11-02	cpu/x86/smm: Pass smm.ld through src-to-obj	Arthur Heymans
2020-10-31	cpu/x86/lapic: rename virtual wire mode initialization function	Felix Held
2020-10-31	{cpu,nb}/intel/haswell: Drop unnecessary `UL` suffix	Angel Pons
2020-10-31	cpu/intel/common: correct MSR for the Nominal Performance in CPPC	Michael Niewöhner
2020-10-30	cpu/x86/sipi_vector.S: Use correct suffix for bts	Jacob Garber
2020-10-30	cpu/x86: increase timeout for CPUs to check in after 2nd SIPI	Jonathan Zhang
2020-10-30	cpu/intel/Makefile.inc: Use correct Kconfig symbols	Angel Pons
2020-10-27	cpu/x86/mtrr: fix OVERFLOW_BEFORE_WIDEN	Jonathan Zhang
2020-10-26	cpu/intel/common: implement the two missing CPPC v2 autonomous registers	Michael Niewöhner
2020-10-24	cpu/intel/common: rework code previously moved to common cpu code	Michael Niewöhner
2020-10-24	{cpu,soc}/intel: deduplicate cpu code	Michael Niewöhner
2020-10-23	haswell/broadwell: Fix typos of `BCLK`	Angel Pons
2020-10-21	cpu/intel/common: Fix regression	Patrick Rudolph
2020-10-21	{cpu,soc}/intel: replace AES-NI locking by common implemenation call	Michael Niewöhner
2020-10-20	cpu/x86/mtrr: add support for address space higher than 16TiB	Jonathan Zhang
2020-10-20	cpu/intel/model_{2065x,206ax}: fix AES-NI locking	Michael Niewöhner
2020-10-19	cpu/intel/common: add a Kconfig to control AES-NI locking	Michael Niewöhner
2020-10-19	cpu/intel/common: only lock AES-NI when supported	Michael Niewöhner
2020-10-19	cpu/intel/common: rework AES-NI locking	Michael Niewöhner
2020-10-19	soc/intel/skl,cpu/intel: copy AES-NI locking to common cpu code	Michael Niewöhner
2020-10-17	cpu/intel,soc/intel: drop Kconfig for hyperthreading	Michael Niewöhner
2020-10-16	include/cpu/x86: introduce new helper for (un)setting MSRs	Michael Niewöhner
2020-10-14	haswell/lynxpoint: Align cosmetics with Broadwell	Angel Pons
2020-10-12	cpu/qemu-x86/cache_as_ram_bootblock: Fix wrong instruction	Patrick Rudolph
2020-10-02	drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES config	Shelley Chen
2020-09-29	cpu/qemu-x86/car: Move long mode entry right before c entry	Patrick Rudolph
2020-09-29	cpu/x86/smm/smihandler.c: Implement smm_get_save_state()	Arthur Heymans
2020-09-29	cpu/x86/smm/smmhandler.c: Get revision using C code	Arthur Heymans
2020-09-28	cpu/intel/206ax/acpi.c: Fix get_cores_per_package	Evgeny Zinoviev
2020-09-27	cpu/intel/haswell/smmrelocate.c: Spell `CPU` in uppercase	Angel Pons
2020-09-27	cpu/intel/haswell/haswell_init.c: Align printk's with Broadwell	Angel Pons
2020-09-26	cpu/qemu-x86: Drop select SMP	Kyösti Mälkki
2020-09-26	arch/x86: Introduce `ARCH_ALL_STAGES_X86_32`	Angel Pons
2020-09-26	arch/x86: Introduce `ARCH_ALL_STAGES_X86_64`	Angel Pons
2020-09-21	src/cpu: Drop unneeded empty lines	Elyes HAOUAS
2020-09-21	cpu/x86/smm.h: Add function to return the SMM save state revision	Arthur Heymans
2020-09-12	cpu/intel/model_1067x: enable PECI	Michael Büchler
2020-08-30	cpu/intel/haswell: Set LT_LOCK_MEMORY MSR on finalize step	Angel Pons
2020-08-30	cpu/x86/smm/smmhandler: Fix x86_64 assembly exit	Patrick Rudolph
2020-08-24	Revert "cpu/x86/sipi: Add x86_64 support"	Patrick Rudolph
2020-08-24	cpu/x86/smm/smm_module_handler: Add x86_64 support	Patrick Rudolph