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AgeCommit message (Expand)Author
2020-06-13cpu/intel/car: Use symbols for CAR MTRR setupKyösti Mälkki
2020-06-13treewide: Add Kconfig variable MEMLAYOUT_LD_FILEFurquan Shaikh
2020-06-10amd/00730F01: Clean the Microcode updatingZheng Bao
2020-06-06src: Remove unused 'include <cpu/x86/mtrr.h>'Elyes HAOUAS
2020-06-06cpu/intel/haswell: Remove unused 'include <cpu/x86/bist.h>'Elyes HAOUAS
2020-06-06src: Remove unused '#include <cpu/x86/smm.h>'Elyes HAOUAS
2020-06-04cpu/intel/slot_1: Select 16KiB bootblock if console is enabledKeith Hui
2020-06-02amd/microcode: Change equivalant ID width to 16bitZheng Bao
2020-06-02cpu/x86/mtrr: add x86_setup_mtrrs_with_detect_no_above_4gb()Aaron Durbin
2020-06-02cpu/x86/mtrr: add helper for setting multiple MTRRsAaron Durbin
2020-06-02src: Remove unused '#include <cpu/x86/lapic.h>'Elyes HAOUAS
2020-05-28arch/x86: Remove more romcc leftoversKyösti Mälkki
2020-05-28cpu/intel/common: Fix typo in commentElyes HAOUAS
2020-05-18src: Remove leading blank lines from SPDX headerElyes HAOUAS
2020-05-13src: Remove unused '#include <stddef.h>'Elyes HAOUAS
2020-05-13src: Remove unused '#include <stdint.h>'Elyes HAOUAS
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-10src/cpu: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-05-09src/: Replace GPL boilerplate with SPDX headersPatrick Georgi
2020-05-08cpu/x86/mtrr: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-05-06treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi
2020-05-06treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi
2020-05-02acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh
2020-05-02intel/stm: Drop now unneeded `num_cpus` paramEugene D Myers
2020-05-02intel/stm: Place resource list right below MSEGEugene D Myers
2020-05-01cpu/x86/mtrr/earlymtrr: Validate MTRR argumentsRaul E Rangel
2020-05-01src: Remove unused 'include <cpu/x86/cache.h>'Elyes HAOUAS
2020-04-29arch/x86: Implement RESET_VECTOR_IN_RAMFelix Held
2020-04-29src/cpu/x86/mtrr/earlymtrr: Add clear_all_var_mtrrRaul E Rangel
2020-04-29cpu/x86/16bit/entry16.inc: Fix typos in commentRaul E Rangel
2020-04-28device: Constify struct device * parameter to acpi_fill_ssdt()Furquan Shaikh
2020-04-04src/cpu: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-29cpu/x86/Makefile.inc: Fix external toolchain buildArthur Heymans
2020-03-25acpi: correct the processor devices scopeMichał Żygowski
2020-03-23acpi: Change Processor ACPI Name (Intel only)Christian Walter
2020-03-21cpu/x86: Fix typoSubrata Banik
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-03-15cpu/intel/model_2065x: Add missing CPU IDsAngel Pons
2020-03-15treewide: Replace uses of "Nehalem"Angel Pons
2020-03-15nb/intel/nehalem: Rename to ironlakeAngel Pons
2020-03-11prog_loaders: Remove CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADINGJulius Werner
2020-03-07cpu/x86/smm: Add smm_size to relocatable smmstubArthur Heymans
2020-03-04src: capitalize 'PCIe'Elyes HAOUAS
2020-03-04cpu/intel/model_206ax: Lock MSR on all coresPatrick Rudolph
2020-03-04cpu/microcode: Fix config CPU_MICROCODE_CBFS_EXTERNAL_BINSNico Huber
2020-03-03cpu/intel/slot_1: Cache romstage XIP executionArthur Heymans
2020-02-24cpu/Kconfig: Remove old reference to ROMCCElyes HAOUAS
2020-02-24src: capitalize 'RAM'Elyes HAOUAS
2020-02-21cpu/x86/smm: Convert C++ style commentEugene Myers
2020-02-18cpu: Allow to configure microcode at pre-defined addressAndrey Petrov
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