summaryrefslogtreecommitdiff
path: root/src/cpu
AgeCommit message (Expand)Author
2016-06-18intel/cache_as_ram_ht.inc: Fix includeKyösti Mälkki
2016-06-18intel cache_as_ram: Fix typo in commentKyösti Mälkki
2016-06-17intel/model_206ax: Move platform specific definesKyösti Mälkki
2016-06-17Move definitions of HIGH_MEMORY_SAVEKyösti Mälkki
2016-06-17Fix some cbmem.h includesKyösti Mälkki
2016-05-18AGESA vendorcode: Build a common amdlibKyösti Mälkki
2016-05-17intel/sch: Merge northbridge and southbridge in src/socStefan Reinauer
2016-05-12AGESA f12: Build as libagesa.aKyösti Mälkki
2016-05-12AGESA f16kb: Build as libagesa.aKyösti Mälkki
2016-05-09drivers/uart: Use uart_platform_refclk for all UART modelsLee Leahy
2016-05-06cpu/x86: don't treat all chipsets the same regarding XIP_ROM_SIZEAaron Durbin
2016-05-06{cpu,soc}/intel: remove unused smm_init() functionAaron Durbin
2016-05-06cpu/x86/mp_init: reduce exposure of internal implementationAaron Durbin
2016-05-06cpu/intel/haswell: convert to using common MP and SMM initAaron Durbin
2016-05-04cpu/x86: combine multiprocessor and SMM initializationAaron Durbin
2016-05-04cpu/x86: remove BACKUP_DEFAULT_SMM_REGION optionAaron Durbin
2016-05-04cpu/x86/smm_module_loader: always build with SMM module supportAaron Durbin
2016-05-02cpu/x86/mp_init: remove unused callback argumentsAaron Durbin
2016-04-28soc/intel/apollolake: Add cache for BIOS ROMAndrey Petrov
2016-04-11cpu/x86/tsc: Compile TSC timer for postcar as wellAndrey Petrov
2016-04-11cpu/x86/tsc: remove conditional compilationAaron Durbin
2016-04-11cpu/x86/tsc: compile same code for all stagesAaron Durbin
2016-04-11cpu/x86/tsc: prepare for CAR_GLOBAL in delay_tsc.cAaron Durbin
2016-04-11src/cpu/x86: remove TSC_CALIBRATE_WITH_IOAaron Durbin
2016-04-10am335x: Add some code for manipulating GPIOsGabe Black
2016-04-10am335x: Add data structures for the clock module registersGabe Black
2016-03-31src/: Fix lint style-labels warningsMartin Roth
2016-03-23arch/x86: introduce postcar stage/phaseAaron Durbin
2016-03-18mtrr: Define a function for obtaining free var mtrrFurquan Shaikh
2016-03-16cpu/x86: compile earlymtrr.c code for romstage as wellAndrey Petrov
2016-03-16cpu/x86/mtrr: remove early_mtrr_* functionsAaron Durbin
2016-03-16cpu/x86/mtrr: move cache_ramstage() to its only userAaron Durbin
2016-03-10cpu/via/c7: Don't manually include udelay_io.cStefan Reinauer
2016-03-10northbridge/intel/i440bx: Unify UDELAY selectionStefan Reinauer
2016-03-08x86 chipsets: utilize x86_setup_mtrrs_with_detect()Aaron Durbin
2016-03-08Kconfig: Remove unneeded UDELAY_IO redeclarationStefan Reinauer
2016-03-08cpu/x86/mtrr: add helper function to detect variable MTRRsAaron Durbin
2016-03-08cpu/x86: Sort some Kconfig optionsStefan Reinauer
2016-03-05arch/x86: document CAR symbols and expose them in symbols.hAndrey Petrov
2016-03-04arch/x86: always use _start as entry symbol for all stagesAaron Durbin
2016-03-04arch/x86: rename reset_vector -> _startAaron Durbin
2016-03-03cpu/x86/16bit: rename _start -> _start16bitAaron Durbin
2016-03-03cpu/x86/16bit/reset16: mark reset vector executableAaron Durbin
2016-03-03cpu/x86/16bit/reset16: remove stale 32-bit jumpAaron Durbin
2016-02-26tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))"Denis 'GNUtoo' Carikli
2016-02-19cpu/qemu-power8: don't enable it for qemu-x86Patrick Georgi
2016-02-19power8: qemu "cpu"Ronald G. Minnich
2016-02-18cpu/amd: Add socket FM2Damien Zammit
2016-02-14cpu/amd: Update/Add license headersDamien Roth
2016-02-14CPU/intel: Add missing license headersDamien Roth
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-14 13:24:31 +0000