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path: root/src/cpu
AgeCommit message (Expand)Author
2015-11-23cpu/amd/fam15h: Set up Link Base Channel Buffer Count registersTimothy Pearson
2015-11-23cpu/amd: de-duplicate MSR include filesStefan Reinauer
2015-11-22cpu/amd/fam10h15h: Set up SRI to XCS Token Count registers on Family 15hTimothy Pearson
2015-11-22cpu/amd/family_10h-family_15h: Set up cache controls on Family 15h to improve...Timothy Pearson
2015-11-22cpu/amd/family_10h-family_15h: Set up link XCS token counts on Family 15hTimothy Pearson
2015-11-22cpu/amd/family_10h-family_15h: Configure NB register 2Timothy Pearson
2015-11-21cpu/amd/car/post_cache_as_ram: Avoid trailing spacesPaul Menzel
2015-11-21amd/family_10h-family_15h: Fix poor performance on Family 15h CPUsTimothy Pearson
2015-11-20northbridge/amd/amdht: Add support for HT3 2.8GHz and up link frequenciesTimothy Pearson
2015-11-20cpu/amd/family_10h-family_15h: Fix incorrect revision detectionTimothy Pearson
2015-11-20nb/amd/amdfam10: Add HyperTransport probe filter supportTimothy Pearson
2015-11-20fsp1_0: Remove hardcoded microcode locationsMartin Roth
2015-11-20cpu/amd/fam10h-fam15h: Set northbridge throttle valuesTimothy Pearson
2015-11-19cpu/amd/fam10h-fam15h: Bring HT register configuration in line with BKDGTimothy Pearson
2015-11-19x86: Add Kconfig to disable early bootblock postcodesMartin Roth
2015-11-18cpu/amd/fam10h-fam15h: Update Fam15h APIC config and startup sequenceTimothy Pearson
2015-11-16intel/fsp_model_406dx: Load APs microcode in model_406dx_initDavid Guckian
2015-11-16intel/fsp_rangeley: Load BSP microcode in bootblockDavid Guckian
2015-11-16cpu/amd/fam10h-15h: Fix BSP stack corruption on 32-core Fam10 systemsTimothy Pearson
2015-11-15amd/model_fxx: Check FID&VID Support for the BSP (too)Urja Rannikko
2015-11-15cpu/amd: Fix AMD Family 15h ECC initialization reliability issuesTimothy Pearson
2015-11-14cpu/x86/lapic: Add stack overrun detectionTimothy Pearson
2015-11-11cpu/amd: Add CC6 supportTimothy Pearson
2015-11-10cpu/amd/car: Add romstage BSP stack overrun detectionTimothy Pearson
2015-11-10cpu: Add a way to use microcode .h files back to the buildMartin Roth
2015-11-10amd/model_fxx: fix code style in FID&VID support checkUrja Rannikko
2015-11-10cpu/intel: Add socket BGA1284Marc Jones
2015-11-08cpu/amd/family_10h-family_15h: Increase BSP stack sizeTimothy Pearson
2015-11-08cpu/amd/family_10h-family_15h: Add Family 15h microcode fileTimothy Pearson
2015-11-06amd/00730F01: Add correct CPU modelKyösti Mälkki
2015-11-06AMD binaryPI: Fix include pathsKyösti Mälkki
2015-11-05cpu/microcode: Remove EXTERNAL / ADDED_DURING_BUILD variablesTimothy Pearson
2015-11-03cpu/amd/model_fxx: Backport PowerNow! core count fix from Family 10hTimothy Pearson
2015-11-02cpu/amd: Add initial AMD Family 15h supportTimothy Pearson
2015-11-02cpu/amd/family_10h-family_15h: Use correct label for break stateTimothy Pearson
2015-11-02cpu/amd: Move model_10xxx to family_10h-family_15hTimothy Pearson
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-31sandybridge: Disable parallel CPU initializationNico Huber
2015-10-30cpu: port amd/pi to 64bitStefan Reinauer
2015-10-30smm: 64bit fixesStefan Reinauer
2015-10-30AMD mainboards: Fix 64bit BiosCallOuts.cStefan Reinauer
2015-10-30cpu/amd/model_fxx: Clear out unused / stale MTRRs in ramstageTimothy Pearson
2015-10-30cpu/amd/model_fxx: Enable FIDVID code on Socket F K8Timothy Pearson
2015-10-30cpu/amd/model_fxx: Backport APIC code and debug aids from Family 10hTimothy Pearson
2015-10-30cpu/amd/car: Honor BKDG recommendations for DisFillP in CARTimothy Pearson
2015-10-30cpu/amd/model_fxx: Fix invalid P-state power valuesTimothy Pearson
2015-10-30cpu/amd/model_fxx: Add Socket F CPU ID mappingsTimothy Pearson
2015-10-29smmhandler: on i945..nehalem, crash if LAPIC overlaps with ASEGPatrick Georgi
2015-10-28cpu/intel/fsp_model_206ax: Load microcode in corebootMartin Roth
2015-10-27cpu/amd/car: Add initial Suspend to RAM (S3) supportTimothy Pearson
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