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path: root/src/cpu
AgeCommit message (Expand)Author
2010-10-06Convert all Intel 440BX boards to Cache-as-RAM (CAR).Uwe Hermann
2010-10-04Add missing Intel Pentium II/III era CPU IDs.Uwe Hermann
2010-10-02Add comments to make it clear why these two lines are written like that:Uwe Hermann
2010-10-01Factor out common CAR asm snippets.Uwe Hermann
2010-10-01Cosmetics, whitespace and coding-style fixes for Intel CAR (trivial).Uwe Hermann
2010-10-01Fix some breakage from 5890.Myles Watson
2010-10-01fix VIA C7 code.Stefan Reinauer
2010-10-01Add missing parenthesis (trivial).Uwe Hermann
2010-10-01CAR simplifications, typos, readability improvements (trivial).Uwe Hermann
2010-09-30Various cosmetic and coding style fixes in CAR code (trivial).Uwe Hermann
2010-09-30Use existing, readable MTRR #defines instead of hardcoding numbers.Uwe Hermann
2010-09-30Rename build system variables to be more intuitive, andPatrick Georgi
2010-09-30fix Kontron KT690 and clean up socket S1G1 boards accordingly.Stefan Reinauer
2010-09-30Move CAR settings to board config for socket 940 boards.Warren Turkal
2010-09-30Move VIA C7 board CAR config to VIA C7 instead of boards.Warren Turkal
2010-09-29Forgot to 'svn add' src/cpu/x86/name (trivial).Uwe Hermann
2010-09-29Factor out fill_processor_name() and strcpy() functions.Uwe Hermann
2010-09-27All these boards already had the CACHE_AS_RAM option in their individualWarren Turkal
2010-09-27Move CAR config from mainboard to CPU config for AMD GX2 boards.Warren Turkal
2010-09-27This patch moves one of the CAR configs to the socket from the singleWarren Turkal
2010-09-27drop some dead code from model_fxx_init.cStefan Reinauer
2010-09-27Add a few missing license headers based on svn logs, and also add aUwe Hermann
2010-09-27drop double include (trivial)Stefan Reinauer
2010-09-26drop some more unneeded ../../..Stefan Reinauer
2010-09-26Normalize the config option for the Intel Atom CPU.Warren Turkal
2010-09-26dumpmmcr utility is available under util and shares most of the code.Stefan Reinauer
2010-09-25Drop <cpu/amd/mtrr.h> #include from Intel CPUs.Uwe Hermann
2010-09-25- Fix race condition in option_table.h generation by moving the includeStefan Reinauer
2010-09-23Whitespace/typo/cosmetic fixes (trivial).Uwe Hermann
2010-09-17Clear bit 35 of msr c001_102a in Fam10 rev C cores.Arne Georg Gleditsch
2010-09-16Add more Fam10 CPUID strings from the AMD revision guide. IncludesMarc Jones
2010-09-14This patch corrects a coding error in the original implementationScott Duplichan
2010-09-13CONFIG_MMCONF_SUPPORT is always defined. Fix build.Myles Watson
2010-09-13Move initialization of MMCONF BAR to cache_as_ram setup phase, in orderArne Georg Gleditsch
2010-09-10Move memory type information out of some AMD sockets.Myles Watson
2010-09-09Adapt comment, too. (trivial)Patrick Georgi
2010-09-09Please find appended. This patch gets rid of the %gs magic altogether,Arne Georg Gleditsch
2010-09-09Apparently, it's not crucial to clear this at the exact moment we switchArne Georg Gleditsch
2010-09-08Trivial - remove stray characters from a comment block.Marc Jones
2010-09-08Make timer2 the default choice for TSC initialization.Patrick Georgi
2010-09-08It should not be necessary to read in the rom during CAR setup.Kevin O'Connor
2010-09-072ms is enough time to accurately obtain the clock rate.Kevin O'Connor
2010-09-07Set up an arbitrary amount of system memory on Geode LX, soAurelien Guillaume
2010-08-30We call this cache as ram everywhere, so let's call it the same in KconfigStefan Reinauer
2010-08-30mPGA479M Sockets can take Intel Mobile Celeron.Andreas Schultz
2010-08-22I've checked Revision Guide for AMD Family10h processors (#41322) revXavi Drudis Ferran
2010-08-22RB_C3 should also apply the workaround for errata 354, according toXavi Drudis Ferran
2010-08-22RB_C3 and HY-D0 should also apply the workaround for errata 344, according toXavi Drudis Ferran
2010-08-22Complete code for errata 343. Revision Guide for AMD Family10hXavi Drudis Ferran
2010-08-22Include RB_C3 in erratum 346Xavi Drudis Ferran