| Age | Commit message (Expand) | Author |
|---|
| 2010-10-06 | Convert all Intel 440BX boards to Cache-as-RAM (CAR). | Uwe Hermann |
| 2010-10-04 | Add missing Intel Pentium II/III era CPU IDs. | Uwe Hermann |
| 2010-10-02 | Add comments to make it clear why these two lines are written like that: | Uwe Hermann |
| 2010-10-01 | Factor out common CAR asm snippets. | Uwe Hermann |
| 2010-10-01 | Cosmetics, whitespace and coding-style fixes for Intel CAR (trivial). | Uwe Hermann |
| 2010-10-01 | Fix some breakage from 5890. | Myles Watson |
| 2010-10-01 | fix VIA C7 code. | Stefan Reinauer |
| 2010-10-01 | Add missing parenthesis (trivial). | Uwe Hermann |
| 2010-10-01 | CAR simplifications, typos, readability improvements (trivial). | Uwe Hermann |
| 2010-09-30 | Various cosmetic and coding style fixes in CAR code (trivial). | Uwe Hermann |
| 2010-09-30 | Use existing, readable MTRR #defines instead of hardcoding numbers. | Uwe Hermann |
| 2010-09-30 | Rename build system variables to be more intuitive, and | Patrick Georgi |
| 2010-09-30 | fix Kontron KT690 and clean up socket S1G1 boards accordingly. | Stefan Reinauer |
| 2010-09-30 | Move CAR settings to board config for socket 940 boards. | Warren Turkal |
| 2010-09-30 | Move VIA C7 board CAR config to VIA C7 instead of boards. | Warren Turkal |
| 2010-09-29 | Forgot to 'svn add' src/cpu/x86/name (trivial). | Uwe Hermann |
| 2010-09-29 | Factor out fill_processor_name() and strcpy() functions. | Uwe Hermann |
| 2010-09-27 | All these boards already had the CACHE_AS_RAM option in their individual | Warren Turkal |
| 2010-09-27 | Move CAR config from mainboard to CPU config for AMD GX2 boards. | Warren Turkal |
| 2010-09-27 | This patch moves one of the CAR configs to the socket from the single | Warren Turkal |
| 2010-09-27 | drop some dead code from model_fxx_init.c | Stefan Reinauer |
| 2010-09-27 | Add a few missing license headers based on svn logs, and also add a | Uwe Hermann |
| 2010-09-27 | drop double include (trivial) | Stefan Reinauer |
| 2010-09-26 | drop some more unneeded ../../.. | Stefan Reinauer |
| 2010-09-26 | Normalize the config option for the Intel Atom CPU. | Warren Turkal |
| 2010-09-26 | dumpmmcr utility is available under util and shares most of the code. | Stefan Reinauer |
| 2010-09-25 | Drop <cpu/amd/mtrr.h> #include from Intel CPUs. | Uwe Hermann |
| 2010-09-25 | - Fix race condition in option_table.h generation by moving the include | Stefan Reinauer |
| 2010-09-23 | Whitespace/typo/cosmetic fixes (trivial). | Uwe Hermann |
| 2010-09-17 | Clear bit 35 of msr c001_102a in Fam10 rev C cores. | Arne Georg Gleditsch |
| 2010-09-16 | Add more Fam10 CPUID strings from the AMD revision guide. Includes | Marc Jones |
| 2010-09-14 | This patch corrects a coding error in the original implementation | Scott Duplichan |
| 2010-09-13 | CONFIG_MMCONF_SUPPORT is always defined. Fix build. | Myles Watson |
| 2010-09-13 | Move initialization of MMCONF BAR to cache_as_ram setup phase, in order | Arne Georg Gleditsch |
| 2010-09-10 | Move memory type information out of some AMD sockets. | Myles Watson |
| 2010-09-09 | Adapt comment, too. (trivial) | Patrick Georgi |
| 2010-09-09 | Please find appended. This patch gets rid of the %gs magic altogether, | Arne Georg Gleditsch |
| 2010-09-09 | Apparently, it's not crucial to clear this at the exact moment we switch | Arne Georg Gleditsch |
| 2010-09-08 | Trivial - remove stray characters from a comment block. | Marc Jones |
| 2010-09-08 | Make timer2 the default choice for TSC initialization. | Patrick Georgi |
| 2010-09-08 | It should not be necessary to read in the rom during CAR setup. | Kevin O'Connor |
| 2010-09-07 | 2ms is enough time to accurately obtain the clock rate. | Kevin O'Connor |
| 2010-09-07 | Set up an arbitrary amount of system memory on Geode LX, so | Aurelien Guillaume |
| 2010-08-30 | We call this cache as ram everywhere, so let's call it the same in Kconfig | Stefan Reinauer |
| 2010-08-30 | mPGA479M Sockets can take Intel Mobile Celeron. | Andreas Schultz |
| 2010-08-22 | I've checked Revision Guide for AMD Family10h processors (#41322) rev | Xavi Drudis Ferran |
| 2010-08-22 | RB_C3 should also apply the workaround for errata 354, according to | Xavi Drudis Ferran |
| 2010-08-22 | RB_C3 and HY-D0 should also apply the workaround for errata 344, according to | Xavi Drudis Ferran |
| 2010-08-22 | Complete code for errata 343. Revision Guide for AMD Family10h | Xavi Drudis Ferran |
| 2010-08-22 | Include RB_C3 in erratum 346 | Xavi Drudis Ferran |
