coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2017-10-13	src/device: Update LTR configuration scheme	Aamir Bohra
2017-07-15	device/pciexp_device.c: Terminate CLK PM message with newline	Arthur Heymans
2017-06-09	pciexp_device: Remove useless write on a read-only register	Youness Alaoui
2017-06-09	pciexp_device: Prevent race condition with retrain link	Youness Alaoui
2016-12-06	PCI ops: Define read-modify-write routines globally	Kyösti Mälkki
2016-12-01	PCIEXP_PLUGIN_SUPPORT: Change dependency on PCI access	Kyösti Mälkki
2016-12-01	PCIEXP_ASPM: Unify code with other PCI-e tuning	Kyösti Mälkki
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-10-30	Revert "device/pciexp_device: Tune PCIe bridges before scanning children"	Kyösti Mälkki
2015-10-25	device/pciexp_device: Tune PCIe bridges before scanning children	Timothy Pearson
2015-06-17	PCIe : Adding some error/not-null condition checking	Pratik Prajapati
2015-06-04	devicetree: Change scan_bus() prototype in device ops	Kyösti Mälkki
2015-06-04	PCI subsystem: Drop parameter max from scan_bus	Kyösti Mälkki
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-03-23	PCIe: Revise L1 Sub-State support	Kenji Chen
2015-03-23	PCIe: Add L1 Sub-State support.	Kenji Chen
2015-03-09	device/pciexp: Add support for PCIe CLK power management	Kane Chen
2013-03-01	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel
2012-11-30	Rename devices -> device	Stefan Reinauer