coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2017-05-18	coreboot_tables: specify clear interface for lb_framebuffer()	Aaron Durbin
2017-03-28	Remove libverstage as separate library and source file class	Julius Werner
2017-03-28	soc/intel/common/block: Add cache as ram init and teardown code	Subrata Banik
2017-03-17	drivers/intel/fsp1_1: Fix issues detected by checkpatch	Lee Leahy
2017-03-14	drivers/intel/fsp1_1: Only display MMCONF address if supported	Lee Leahy
2017-02-22	drivers/intel/{fsp1_1,fsp2_0}: Provide separate function for fsp load	Furquan Shaikh
2017-01-19	driver/intel/fsp1_1: Fix boot failure for non-verstage case	Teo Boon Tiong
2016-12-15	soc/intel/common: remove mrc cache assumptions	Aaron Durbin
2016-12-13	intel MMA: Enable MMA with FSP2.0	Pratik Prajapati
2016-12-01	lib: put romstage_handoff implementation in own compilation unit	Aaron Durbin
2016-12-01	romstage_handoff: remove code duplication	Aaron Durbin
2016-11-18	intel post-car: Increase stacktop alignment	Kyösti Mälkki
2016-10-31	lib/prog_loaders: use common ramstage_cache_invalid()	Aaron Durbin
2016-10-27	driver/intel/fsp2_0: Reset on invalid stage cache.	Naresh G Solanki
2016-09-30	Kconfig: Prefix hex defaults with 0x	Martin Roth
2016-09-19	driver/intel/fsp1_1: Utilise soc/intel/common for adding vbt.bin	Naresh G Solanki
2016-08-31	src/drivers: Add required space before opening parenthesis '('	Elyes HAOUAS
2016-08-25	vboot: consolidate google_chromeec_early_init() calls	Aaron Durbin
2016-08-11	intel/fsp1_1: Use new per-region position override	Patrick Georgi
2016-08-10	drivers/intel/fsp1_1: Add fsp_write_line function	Lee Leahy
2016-08-06	drivers/intel/fsp1_1: only set a base address for FSP in COREBOOT CBFS	Aaron Durbin
2016-07-31	src/drivers: Capitalize CPU, RAM and ACPI	Elyes HAOUAS
2016-07-31	Remove extra newlines from the end of all coreboot files.	Martin Roth
2016-07-28	intel/fsp1_1: Add C entry support to locate FSP Temp RAM Init	Subrata Banik
2016-07-28	bootmode: Get rid of CONFIG_BOOTMODE_STRAPS	Furquan Shaikh
2016-07-27	cpu/x86: Support CPUs without rdmsr/wrmsr instructions	Lee Leahy
2016-07-15	drivers/intel/fsp1_1: align on using ACPI_Sx definitions	Aaron Durbin
2016-07-10	intel post-car: Consolidate choose_top_of_stack()	Kyösti Mälkki
2016-06-29	intel romstage: Use run_ramstage()	Kyösti Mälkki
2016-06-22	Ignore RAMTOP for MTRRs	Kyösti Mälkki
2016-06-03	drivers/intel/fsp1_1: Make weak routines quiet	Lee Leahy
2016-06-03	Add Board Checklist Support	Lee Leahy
2016-06-02	drivers/intel/fsp1_1: Update weak MRC cache routines	Lee Leahy
2016-05-17	drivers/intel/fsp1_1: Simplify union references	Lee Leahy
2016-05-17	drivers/intel/fsp1_1: Replace for/break with returns	Lee Leahy
2016-05-11	cbfstool/fsp: Rename fsp1_1_relocate	Furquan Shaikh
2016-05-11	util/cbfstool: Allow xip/non-xip relocation for FSP component	Furquan Shaikh
2016-05-09	lib/prog_loaders: Allow platforms to skip stage cache	Furquan Shaikh
2016-05-04	soc/intel/common/mrc_cache: Honor MRC data as a constant pointer	Alexandru Gagniuc
2016-05-02	drivers/intel/fsp1_1: fix linking romstage when SEPARATE_VERSTAGE used	Aaron Durbin
2016-04-19	kbuild: Allow drivers to fit src/drivers/[X]/[Y]/ scheme	Stefan Reinauer
2016-03-29	intel/fsp1_1: Do not re-init TPM in romstage if already setup in verstage	Duncan Laurie
2016-03-14	intel/fsp1.1: Mark graphics init done after SiliconInit phase	Duncan Laurie
2016-02-14	Intel common: add microcode loading to romstage before fspmemoryinit	robbie zhang
2016-02-08	drivers/intel/fsp1_1: Make fsp_run_silicon_init public	Lee Leahy
2016-02-02	soc/intel/common: Use SoC specific routine to read/write MTRRs	Lee Leahy
2016-01-31	drivers/intel/fsp1_1: Fix spelling error in API and copyright	Lee Leahy
2016-01-29	intel/skylake: Implement native Cache-as-RAM (CAR)	Subrata Banik
2016-01-28	drivers/intel/fsp1_1: Remove extra include references	Lee Leahy
2016-01-27	drivers/intel/fsp1_1: Enable builds without MRC cache	Lee Leahy