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path: root/src/drivers/intel/fsp1_1
AgeCommit message (Expand)Author
2017-07-14drivers/fsp1_1: remove VBT function defs from util.hMatt DeVillier
2017-07-13Rename __attribute__((packed)) --> __packedStefan Reinauer
2017-06-14drivers/fsp1_1: decouple VBT from execution of GOP driverMatt DeVillier
2017-06-08fsp/gop: Add running the GOP to the choice of gfx initNico Huber
2017-06-07src: change coreboot to lowercaseMartin Roth
2017-06-06fsp1_1: Verify FSP_IMAGE_ID/_REV against headersNico Huber
2017-06-02Kconfig: Introduce HAVE_(VBE_)LINEAR_FRAMEBUFFERNico Huber
2017-05-18coreboot_tables: specify clear interface for lb_framebuffer()Aaron Durbin
2017-03-28Remove libverstage as separate library and source file classJulius Werner
2017-03-28soc/intel/common/block: Add cache as ram init and teardown codeSubrata Banik
2017-03-17drivers/intel/fsp1_1: Fix issues detected by checkpatchLee Leahy
2017-03-14drivers/intel/fsp1_1: Only display MMCONF address if supportedLee Leahy
2017-02-22drivers/intel/{fsp1_1,fsp2_0}: Provide separate function for fsp loadFurquan Shaikh
2017-01-19driver/intel/fsp1_1: Fix boot failure for non-verstage caseTeo Boon Tiong
2016-12-15soc/intel/common: remove mrc cache assumptionsAaron Durbin
2016-12-13intel MMA: Enable MMA with FSP2.0Pratik Prajapati
2016-12-01lib: put romstage_handoff implementation in own compilation unitAaron Durbin
2016-12-01romstage_handoff: remove code duplicationAaron Durbin
2016-11-18intel post-car: Increase stacktop alignmentKyösti Mälkki
2016-10-31lib/prog_loaders: use common ramstage_cache_invalid()Aaron Durbin
2016-10-27driver/intel/fsp2_0: Reset on invalid stage cache.Naresh G Solanki
2016-09-30Kconfig: Prefix hex defaults with 0xMartin Roth
2016-09-19driver/intel/fsp1_1: Utilise soc/intel/common for adding vbt.binNaresh G Solanki
2016-08-31src/drivers: Add required space before opening parenthesis '('Elyes HAOUAS
2016-08-25vboot: consolidate google_chromeec_early_init() callsAaron Durbin
2016-08-11intel/fsp1_1: Use new per-region position overridePatrick Georgi
2016-08-10drivers/intel/fsp1_1: Add fsp_write_line functionLee Leahy
2016-08-06drivers/intel/fsp1_1: only set a base address for FSP in COREBOOT CBFSAaron Durbin
2016-07-31src/drivers: Capitalize CPU, RAM and ACPIElyes HAOUAS
2016-07-31Remove extra newlines from the end of all coreboot files.Martin Roth
2016-07-28intel/fsp1_1: Add C entry support to locate FSP Temp RAM InitSubrata Banik
2016-07-28bootmode: Get rid of CONFIG_BOOTMODE_STRAPSFurquan Shaikh
2016-07-27cpu/x86: Support CPUs without rdmsr/wrmsr instructionsLee Leahy
2016-07-15drivers/intel/fsp1_1: align on using ACPI_Sx definitionsAaron Durbin
2016-07-10intel post-car: Consolidate choose_top_of_stack()Kyösti Mälkki
2016-06-29intel romstage: Use run_ramstage()Kyösti Mälkki
2016-06-22Ignore RAMTOP for MTRRsKyösti Mälkki
2016-06-03drivers/intel/fsp1_1: Make weak routines quietLee Leahy
2016-06-03Add Board Checklist SupportLee Leahy
2016-06-02drivers/intel/fsp1_1: Update weak MRC cache routinesLee Leahy
2016-05-17drivers/intel/fsp1_1: Simplify union referencesLee Leahy
2016-05-17drivers/intel/fsp1_1: Replace for/break with returnsLee Leahy
2016-05-11cbfstool/fsp: Rename fsp1_1_relocateFurquan Shaikh
2016-05-11util/cbfstool: Allow xip/non-xip relocation for FSP componentFurquan Shaikh
2016-05-09lib/prog_loaders: Allow platforms to skip stage cacheFurquan Shaikh
2016-05-04soc/intel/common/mrc_cache: Honor MRC data as a constant pointerAlexandru Gagniuc
2016-05-02drivers/intel/fsp1_1: fix linking romstage when SEPARATE_VERSTAGE usedAaron Durbin
2016-04-19kbuild: Allow drivers to fit src/drivers/[X]/[Y]/ schemeStefan Reinauer
2016-03-29intel/fsp1_1: Do not re-init TPM in romstage if already setup in verstageDuncan Laurie
2016-03-14intel/fsp1.1: Mark graphics init done after SiliconInit phaseDuncan Laurie
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