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path: root/src/ec/google/chromeec/Makefile.inc
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2020-07-07ec/google: Add function ec_fill_dptf_helpers()Tim Wawrzynczak
ec_fill_dptf_helpers() is used to generate all of the "helper" methods that DPTF requires. A system with a Chrome EC is typically in charge of fan PWM control as well as battery charging, so if DPTF needs to manipulate those, then it requires Methods provided by the EC. BUG=b:143539650 TEST=compiles Change-Id: Ib30072d1d0748b31bcab240a0fd0e2f12d34aaa4 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41894 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-05ec/google/chromeec: Add driver for audio codec deviceFurquan Shaikh
This change adds driver for audio codec device (HID `GOOG0013`) living behind Chrome EC. This driver generates the required ACPI node for the codec device. In a later change, GOOG0013 device will be dropped the .asl file. Change-Id: Ib2759eac60265ef81df70af1d4f1f72bd9d987e8 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43041 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-22ec/google/chromeec: Add driver for i2c_tunnel device under Chrome ECFurquan Shaikh
This change enables support for generating ACPI nodes for I2C tunnel for any GOOG0012 device that is sitting behind the Chrome EC. It accepts a config "remote_bus" which allows mainboard to configure the id of the remote bus that is being tunneled. BUG=b:154290952 BRANCH=None TEST=Verified that SSDT node for I2C tunnel behind Chrome EC is generated correctly. Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: Icfc0ec3725d7f1d20bcb5cb43a0a23aac72bf4eb Reviewed-on: https://review.coreboot.org/c/coreboot/+/40515 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2020-03-06ec/google/chromeec: Fix dev ops for chromeecFurquan Shaikh
CB:38541 ("ec/google/chromeec: Add SSDT generator for ChromeOS EC") added a new device_operations structure for chromeec for handling ACPI SSDT generation. However, this resulted in the original device_operations which handled lpc read resources to be skipped. This change fixes the above regression by combining the device operations for reading resources and ACPI SSDT generation into a single structure and retains the old logic for enabling of pnp devices. Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: I3a242f4b15603f957e0e81d121e5766fccf3c28d Reviewed-on: https://review.coreboot.org/c/coreboot/+/39321 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-03-04mainboard/google/octopus: Migrate onto SKU ID helpersEdward O'Callaghan
Leverage the common sku id space helper encoders and set the sku id max to 0xff for legacy to ensure we behave the same. BUG=b:149348474 BRANCH=none TEST=tested on hatch Change-Id: I60a37a5f9659b8df4018872956f95e07a3506440 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39035 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2020-02-28ec/google/chromeec: Introduce SKU_ID helpersEdward O'Callaghan
The following introduces helpers that, by default, accommodate a larger SKU id space. The following is the rational for that: Allow INT32_MAX SKU id encodings beyond UINT8_MAX. This allows for the SKU id to accommodate up to 4 bytes however we reserve the highest bit for SKU_UNKNOWN to be encoded. However, the legacy UINT8_MAX encoding is supported by leveraging the Kconfig by overriding it with the legacy max of 0xff. Follow ups migrate boards to this common framework. V.2: Fixup array size && drop sku_id SKU_UNKNOWN check and pass whatever is set to userspace as firmware doesn't care about the value. V.3: Use SPDX-License header. BUG=b:149348474 BRANCH=none TEST=tested on hatch. Change-Id: I805b25465a3b4ee3dc0cbda5feb9e9ea2493ff9e Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39018 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-02-18ec/google/chromeec: Add SSDT generator for ChromeOS ECTim Wawrzynczak
Upcoming patches for the Linux kernel (5.6 ?) would like to consume information about the USB PD ports that are attached to the device. This information is obtained from the CrOS EC and exposed in the SSDT ACPI table. Also, the device enable for this PCI device is moved from ec_lpc.c to a new file, ec_chip.c, where EC-related ACPI methods can live. It still allows other code to call functions on device enable (so that PnP enable for the LPC device still gets called). BUG=b:146506369 BRANCH=none TEST=Verify the SSDT contains the expected information Change-Id: I729caecd64d9320fb02c0404c8315122f010970b Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38541 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2019-09-163rdparty/chromeec: Update to latest masterElyes HAOUAS
It's been some time and there are 1420 new commits. Including one that allows reproducible builds \o/ and one that breaks building with empty $(CC) :-/ Change-Id: I5e81d5a2f1018481b9103fc5a1f4b8c72fb9deec Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/30679 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-30ec/google/chromeec: Add boardid.c to verstageYou-Cheng Syu
Modifiy Makefile so that we can get board ID in verstage. BRANCH=none BUG=b:117916698 TEST=manually Change-Id: Idcdb6e07f565c937185cab811abac0ce47e5e3a7 Signed-off-by: You-Cheng Syu <youcheng@google.com> Reviewed-on: https://review.coreboot.org/c/31006 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2018-10-18ec/google/chromeec: Use common MEC interfaceDuncan Laurie
Switch to using the common MEC interface instead of the Chrome EC specific code. Tested on a Chell chromebook that has a MEC based Chrome EC to ensure that the EC interface is still functional. Change-Id: Idf26e62c2843993c2df2ab8ef157b263a71a97c9 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/29112 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-10-11ec/google/chromeec: Add support for querying ec board id in smm stageFurquan Shaikh
This change adds ec_boardid.c to smm stage, which is required to allow mainboards to query the ec to get board version in this stage. BUG=b:112366846,b:112112483,b:112111610 Change-Id: Iccbba96ebb94a12745a62cbfe3496f9e6f921e3d Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/28982 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Enrico Granata <egranata@chromium.org>
2018-03-09ec/google/chromeec: Add boardid.c to bootblockMartin Roth
Update build so that we can get the board ID in bootblock. BUG=b:74248569 TEST=build and boot grunt with follow-on patch. Bayhub part is disabled. Change-Id: I6353bcb4abcef4e8dc2b625082e33b73525c8525 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/25014 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-03-07ec/google/chromeec: Fix typo preventing PD EC firmware inclusionBen Pye
Change-Id: I12ae0d556c43d3d6537cac5d8f640e6a960101ae Signed-off-by: Ben Pye <ben@curlybracket.co.uk> Reviewed-on: https://review.coreboot.org/25017 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-09-26chromeec: Provide helper routine to read boardid from Chrome ECFurquan Shaikh
Instead of duplicating the code across multiple mainboards, provide a helper function to read boardid from Chrome EC. Change-Id: I2008de7032bc880e90b2c3c385b2a67bfb8724cc Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/21681 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
2016-11-18google/chromeec: Add common infrastructure for boot-mode switchesFurquan Shaikh
Instead of defining the same functions for reading/clearing boot-mode switches from EC in every mainboard, add a common infrastructure to enable common functions for handling boot-mode switches if GOOGLE_CHROMEEC is being used. Only boards that were not moved to this new infrastructure are those that do not use GOOGLE_CHROMEEC or which rely on some mainboard specific mechanism for reading boot-mode switches. BUG=None BRANCH=None TEST=abuild compiles all boards successfully with and without ChromeOS option. Change-Id: I267aadea9e616464563df04b51a668b877f0d578 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17449 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner <jwerner@chromium.org>
2016-08-08google/chromeec: Enable/Disable ccache with config variableMartin Roth
If the CONFIG_CCACHE variable is NOT set, define the CCACHE variable as blank on the Chrome EC make command line. This will overrride and disable the CCACHE variable in the Chrome EC makefile. Change-Id: Idb1da06941084cea104d77748820971edf151f7b Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/16035 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-08-04chromeec: Chrome EC firmware source selection for EC and PD firmwaresPaul Kocialkowski
In some cases, we don't want the Chrome EC firmwares (both EC and PD) built directly by the coreboot build system or included in images at all. This is already supported with EC_EXTERNAL_FIRMWARE but it does implement a binary (build and include) or (neither build nor include) policy. Some cases require the ability to separately control whether the EC and PD firmwares should be built and included by the coreboot build system, only included from externally-built images or not included at all. This introduces config changes implementing that behaviour, renaming options to make it clear that they are specific to the Chrome EC. Change-Id: I44ccee715419360eb7d83863f4f134fcda14a8e4 Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/16033 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-07-31build system: really disable building CrEC when not neededPatrick Georgi
Enable users to set the EC_EXTERNAL_FIRMWARE config flag, and actively ignore anything related to EC firmware board names if enabled. BUG=none BRANCH=none CQ-DEPEND=CL:344540 TEST=emerge-samus coreboot works Change-Id: I02aa1e4bc0c98300105b83a12979e9368a40cbcf Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 4f0b6fd10aa89fbb38bdebf14b8a82d52e9ee233 Original-Change-Id: I39c3038d059ec3d7710b864061fcf83b8d6d4d13 Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/345584 Original-Reviewed-by: Aaron Durbin <adurbin@google.com> Original-Commit-Queue: Martin Roth <martinroth@chromium.org> Original-Trybot-Ready: Martin Roth <martinroth@chromium.org> Original-Tested-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/15938 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-07-28skylake/mainboard: Define mainboard hook in bootblockSubrata Banik
Move mainboard post console init functionality (google_chrome_ec_init & early_gpio programming) from verstage to bootblock. Add chromeos-ec support in bootblock BUG=chrome-os-partner:55357 BRANCH=none TEST=Built and boot kunimitsu till POST code 0x34 Change-Id: I1b912985a0234d103dcf025b1a88094e639d197d Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com> Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/15786 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-07-28vboot: Separate vboot from chromeosFurquan Shaikh
VBOOT_VERIFY_FIRMWARE should be independent of CHROMEOS. This allows use of verified boot library without having to stick to CHROMEOS. BUG=chrome-os-partner:55639 Change-Id: Ia2c328712caedd230ab295b8a613e3c1ed1532d9 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15867 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2016-07-27chromeec: Use CHROMEEC_SOURCE with fallback instead of hardcoding pathPaul Kocialkowski
This introduces a CHROMEEC_SOURCE variable used for indicating the CrOS EC source path, with a fallback to 3rdparty/chromeec. This allows specifying an external path for the CrOS EC source path. Change-Id: I9792c7f21597127a385b961b65a00d44cfa37146 Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/15765 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-07-15ec/google/chromeec: provide common SMI handler helpersAaron Durbin
The mainboards which use the Chrome EC duplicate the same logic in the mainboard smi handler. Provide common helper functions for those boards to utilize. BUG=chrome-os-partner:54977 Change-Id: I0d3ad617d211ecbea302114b17ad700b935e24d5 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15685 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins)
2016-06-03chromeec: Move EC image hash to separate file in CBFSJulius Werner
The Chrome OS bootloader is changing its EC software sync mechanism to look for the hash of an EC image in a separate CBFS file, rather than using the CBFS hash attribute of the image itself (see http://crosreview.com/348061). This patch makes coreboot generate appropriate hash files for the new format when it builds and bundles a Chrome EC image. This also allows us to compress the EC image itself. Change-Id: I9aee6b8d24cdf41cb540db86a7569038fc7d9937 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/15039 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-11ec/google/chromeec: provide way to query ioport rangeAaron Durbin
In order to provide other stages access to the ioport range required by the ChromeEC provide google_chromeec_ioport_range() function to fill in the details. Currently, the ioport range is only consumed by the LPC implemenation. Also allow ec_lpc.c to be built for the bootblock stage. Change-Id: I6c181b42e80e71fe07e8fa90df783107287f16ad Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/14769 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-02-09build system: Build Chrome EC firmware on requestPatrick Georgi
With the Chrome EC's "board" name set in Kconfig, the build system will build and add the EC firmware, too. Available for the EC and the USB PD controller. Change-Id: I017d3a44d6ab8a540fcd198b4b09c35e4b98a8cf Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/13547 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-04google/chromeec: implement vboot_(save|retrieve)_hash APIAaron Durbin
For x86 systems which resume through the reset vector one needs to ensure the the RW slot taken at resume time matches the one at boot time. To that end, allow Chrome OS EC to supply the plumbing to vboot for storing and retrieving the RW slots' hash digest using the vstore backend. BUG=chrome-os-partner:46049 BRANCH=glados TEST=Suspended and resumed on chell. Also, tested with an EC build which returns a bad hash to ensure that is properly caught. Change-Id: Ib056f7e6b3386447ed1ff95c740ef5b4544f9049 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 9c78546b1d6298a4c397a587c564df6d9d097e75 Original-Change-Id: I86c96a4092deab2dfa51b3043b9dba16b6a4c201 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/323502 Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/13577 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-04google/chromeec: Add temporary storage interfaceDuncan Laurie
Add support functions for the Chrome EC temporary storage interface. BUG=chrome-os-partner:46049 BRANCH=none TEST=tested on glados with modified coreboot Change-Id: Id2bc46df9cb2d82b15e3309e78d07407a622b6f0 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: a7e6f693666b162e11eb0611715f10a8f465ad88 Original-Change-Id: Ieefabfc5bcb9d8a5064f0da967c46d0f377ca320 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/315217 Original-Commit-Ready: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/13572 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-29kbuild: automatically include ECsStefan Reinauer
This change switches all ECs and the generic EC ACPI code to be autoincluded by Makefile.inc, rather than having to be mentioned explicitly in ec/Makefile.inc or in ec/<vendor>/Makefile.inc. This means, vendor and ec directories are now "drop in", e.g. be placed in the coreboot directory hierarchy without having to modify any higher level coreboot files. The long term plan is to enable out of tree components to be built with a given coreboot version (given that the API did not change). Change-Id: I29d757d1f8c10a1d0167a76fd0d0f97bac576f6d Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/9798 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-28chromeos: remove VBOOT2_VERIFY_FIRMWARE optionAaron Durbin
There's no need to have the VBOOT2_VERIFY_FIRMWARE distinction because it's the only game in town. Change-Id: I82aab665934c27829e1a04115bf499ae527a91aa Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9958 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-22chromeec: lpc: Add variant MEC IOShawn Nematbakhsh
MEC cannot access memmap-range data directly though LPC and instead must access through its EMI unit. BUG=chrome-os-partner:38224 TEST=Verify host command functionality on glower. BRANCH=None Change-Id: If98d425014a894ddeafad4268f92af5860878522 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 58ed3c50ab97ca1e172d5cdc00f4cd8e069e565c Original-Change-Id: I32b897836d28ef4f3b3aa5f81b9023f2ceb629c8 Original-Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/263611 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/9910 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-01-27vboot2: read dev and recovery switchDaisuke Nojiri
TEST=Built with VBOOT2_VERIFY_FIRMWARE on/off. Booted Nyan Blaze. BUG=none Branch=none Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: Ia5353018a0db3dae2e0432b7e6a34d46f81b0ffa Original-Reviewed-on: https://chromium-review.googlesource.com/206064 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit b420451c71c86bc27784d920f53870ee56ddc0f2) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I30c9f0ac44de0a5816b5b8d0ded2dc7d7e77c7a1 Reviewed-on: http://review.coreboot.org/8162 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2013-07-10ec/google: Support ChromeOS EC on SPI bus.Hung-Te Lin
For devices with ChromeOS EC on SPI bus, use the standard SPI driver interface (see spi-generic.h) to exchange data. Note: Only EC protocol v3 is supported for SPI bus. Change-Id: Ia8dcdecd125a2bd7424d0c7560e046b6d6988a03 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/3751 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-10ec/google: Generalize communication protocol support in EC drivers.Hung-Te Lin
Since EC protocol v3, the packet format will be the same for all buses (inclding I2C, SPI, and LPC). That will simplify the implementation in each individual bus driver source file. To prepare for that, we will move the protocol part into crosec_proto.c: crosec_command_proto, with bus driver in callback "crosec_io". Change-Id: I9ccd19a57a182899dd1ef1cd90598679c1546295 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/3749 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-04-18ChromeEC: Drop unneeded Kconfig variable EC_GOOGLE_API_ROOTStefan Reinauer
This used to contain the path for the EC include files, but those files are included in coreboot now. Signed-off-by: Stefan Reinauer <reinauer@google.com> Change-Id: I4fce9831c5e21b0a69a6295dbda2580e1ca83369 Reviewed-on: https://gerrit.chromium.org/gerrit/47606 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Stefan Reinauer <reinauer@google.com> Tested-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/3057 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-04-16ec/google: Support Google's Chrome EC on I2C interface.Hung-Te Lin
Google's Chrome EC can be installed on LPC or I2C bus, using different command protocol. This commit adds I2C support for devices like Google/Snow. Note: I2C interface cannot be automatically probed so the bus and chip number must be explicitly set. Verified by booting Google/Snow, with following console output: Google Chrome EC: Hello got back 11223344 status (0) Google Chrome EC: version: ro: snow_v1.3.108-30f8374 rw: snow_v1.3.128-e35f60e running image: 1 Change-Id: I8023eb96cf477755d277fd7991bdb7d9392f10f7 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/3074 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-04-12ec/google: Isolate EC bus protocol implementation.Hung-Te Lin
The Chrome EC can be connected by different types of bus like LPC / I2C / SPI, and the current implementation is only for LPC. To support other types, we must first isolate the LPC protocol stuff and add configuration variable (EC_GOOGLE_CHROMEEC_LPC) to specify bus type. Verified by building google/link (with chromeec) configuration successfully. Change-Id: Ib2920d8d935bcc77a5394e818f69e9265e26e8a0 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/3068 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-02-22Add support for Google ChromeECStefan Reinauer
Google ChromeEC is an EC with completely open source firmware. See https://gerrit.chromium.org/gerrit/gitweb?p=chromiumos/platform/ec.git;a=summary for the EC firmware source code (aka more information about the ChromeEC) This patch adds support for the ChromeEC on coreboot's side. Great thanks to the ChromeEC team for this amazing work. It's another important milestone towards a free and open firmware stack on modern hardware. Change-Id: Iace78af9d291791d2f5f80ccca1587b418738cec Signed-off-by: Stefan Reinauer <reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/2481 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martin.roth@se-eng.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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