coreboot - Some coreboot project code with my work

Age	Commit message (Collapse)	Author
2019-02-04	ec/google/wilco: Add ACPI device for event interface	Duncan Laurie
	Add a separate ACPI device for the Wilco EC event interface so that the OS drivers can bind to it separately. Since the event handling is all done with ACPI and not mailbox calls this will be implemented as a standard acpi_driver in the kernel. BUG=b:119046283 TEST=veriy device exists in DSDT Change-Id: I5259a926fb6d5faea835bcdefa12f0184c5adf4a Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/31204 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-11-02	ec/google/wilco: Add wake pin configuration	Duncan Laurie
	Add a way for the mainboard to provide a wake pin that the EC will use to wake the system. This defines a _PRW object. Change-Id: I94954104bbb8226683c37abc8c0465fe3c62a693 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/29408 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-10-31	ec/google/wilco: Add ACPI EC infrastructure	Duncan Laurie
	Add the base ACPI support for the Wilco embedded controller, using ASL 2.0 syntax throughout. This includes the EC device and its resources, as well as the layout for the EC RAM and the functions needed to read and write to the EC RAM. The EC RAM address space is typically read/write, and so the ACPI EC device expects that a defined Field can be read and/or written. With this EC the read and write address spaces are different. For example, a read from address zero will return data that is unrelated to what a write to address zero expects. This makes using a typical OperationRegion to describe the EC RAM address space somewhat impracticle, since field definitions would overlap. Instead, methods are provided for reading and writing to an EC RAM offset, and the EC RAM layout is defined as a Package that describes offset+mask for read or write fields within the EC RAM. Change-Id: If8cfdf2633db1ccad4306fe877180ba197ee7414 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/29122 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>