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2014-04-09ec/compal/ene932/ec.h: Include stdint.h for definition of 'u8'Alexandru Gagniuc
Change-Id: I7ffa8e8f807e7d8a778eb80c12a0dc984bdb3f8b Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/5470 Reviewed-by: Aaron Durbin <adurbin@google.com> Tested-by: build bot (Jenkins)
2014-03-01lenovo/x60: Unify volume button handling with common code.Vladimir Serbinenko
Change-Id: I45fe44a91f9f83a510b204e01dbaff9e8a9696ca Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5099 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-01-30chromeec: allow override of i8042 interruptAaron Durbin
Some boards need to override which IRQ the i8042 keyboard controller has its interrupt on instead of the default IRQ#1. The SIO_EC_PS2K_IRQ macro provides the mainboard an ability to override the interrupt location. BUG=chrome-os-partner:23965 BRANCH=None TEST=Built and booted rambi using this option. New IRQ is correctly picked up by kernel allowing keyboard support. Change-Id: Ic2b222018dfc3aa30e24a31009e832ae0fb7e9cf Reviewed-on: https://chromium-review.googlesource.com/177222 Tested-by: Bernie Thompson <bhthompson@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Tested-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4978 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-30chrome ec: Fix ASL to use IO() instead of FixedIO()Duncan Laurie
FixedIO seems like a nice short version of IO but in reality it is limited to 10-bit ISA addresses and so should not really be used in most situations. Change all the references to use IO() directly instead. BUG=chromium:311294 BRANCH=none TEST=emerge-samus chromeos-coreboot-samus and check for iasl warnings using updated iasl compiler revision 20130117. Boot the imge and ensure that EC regions are still exported in /proc/ioports. Change-Id: I54de65892bed9e43dbba916990cf2b70c370843c Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/174810 Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4910 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-12acpi/ec: Add missing delaysVladimir Serbinenko
Without these delays on fast systems like X230 the port is read before it's updated. Change-Id: I3e01fc348cc5170cec108a05095ba301055ed6b0 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4617 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Add backlight control.Vladimir Serbinenko
Change-Id: I773793bf53d91ae787bd0d0ae7bd882243196d56 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4678 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Make trackpoint enable a CMOS option.Vladimir Serbinenko
To be consistent with touchpad counterpart. Change-Id: I72d09b41b964f80a81fbf409ef69dd368834a3e2 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4654 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Remove trackpoint_enable from device tree.Vladimir Serbinenko
Change-Id: I6652e0ad4e0179950f775bbd0200484907bfc976 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4653 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: make wlan config a CMOS optionVladimir Serbinenko
To stay in line with wwan and bluetooth. Change-Id: Iafe2dc97fc2aec5c2ad1834659b796a6b079c1bc Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4652 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Allow control of low-battery beep.Vladimir Serbinenko
Change-Id: I2f422e83f2afcf0cc3f3ecbace01a8f4f39e87d4 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4663 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Allow user to disable powermanagement beeps.Vladimir Serbinenko
They're pretty annoying. Change-Id: I44d26dc168927a9cedfd6ecc4c9a51a3a7b362c7 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4662 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Implement sticky Fn option.Vladimir Serbinenko
Useful for accessibility. Sticky modifier (sticky Fn) is a behaviour of modifier key when you don't have to hold it pressed to achieve the result. E.g. with normal Fn brightness up is: <Press Fn> <Press Home> <Despress Home> <Depress Fn> With sticky Fn you can do: <Press Fn> <Depress Fn> <Press Home> <Despress Home> Change-Id: I4da5adcea02428d936023891de08684cae77c44e Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4661 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Add an option to swap ctrl and fn.Vladimir Serbinenko
Tested on my X201 and X230. Change-Id: I3c7ec65681157d15c6e87eea64779a08e03ae5a8 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4660 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Remove wlan_enable and wwan_enable from device tree.Vladimir Serbinenko
wwan_enable was never used. wlan_enable isn't something for device tree but for CMOS config if at all. Change-Id: I765d9d6f0b73b7dc5a57c0c630a53b4b7a0b48cb Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4651 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-01-10Replace all occurences of sprintf with snprintfVladimir Serbinenko
THis reduces risks of bufer overflows. Change-Id: I77f80e76efec16ac0a0af83d76430a8126a7602d Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4279 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-12-23Coding style: punctuation cleanup [1/2].Idwer Vollering
Clean up superfluous line terminators. Change-Id: If837b4f1b3e7702cbb09ba12f53ed788a8f31386 Signed-off-by: Idwer Vollering <vidwer@gmail.com> Reviewed-on: http://review.coreboot.org/4562 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2013-12-21chromeec: Add event methods for EC requested throttleDuncan Laurie
Two new events possible from the EC for starting and stopping throttle. These are handled in a per-board method that is defined under the thermal zone. This is not quite where I wanted it but the scoping rules in ACPI don't let me have a defined external object in the same scope. Change-Id: I766f07b4365b29df3daa8e45e88f7c38c645c287 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/63988 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4415 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-12-19ec/lenovo/h8: Enable 3G modemVladimir Serbinenko
Just like bluetooth and wlan it need to be enabled in EC. Set the appropriate bit in EC if CMOS config says so. Change-Id: Ia48ca3201f013d3b4c4153f32ff536e06b6a2f6d Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4516 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-12-15ec/lenovo/h8: Fix peripheral init without CMOS configVladimir Serbinenko
Currently H8 skips important init if unable to access CMOS config. Change default to enable all features to have a sane system without using CMOS config. Change-Id: I4448ccd21beae8ad23eb22391770c6fe3b83e3b4 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4515 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2013-12-12chromeec: Allow get_board_version to be called from romstage.Shawn Nematbakhsh
We will soon need to call google_chromeec_get_board_version to determine correct DDR SPD. We must do so before DDR is initialized, so allow this function to be called from romstage. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I882d84e38d11bf66067193a6f408f941f2cf8a81 Reviewed-on: https://gerrit.chromium.org/gerrit/61191 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: Shawn Nematbakhsh <shawnn@chromium.org> Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: http://review.coreboot.org/4351 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-12-02Introduce a config whether dock is inited in romstage or notVladimir Serbinenko
Instead of depending on exact mobo configure general characteristic whether dock is configured in romstage or ramstage. X60 and T60 have superio in dock so it needs to be inited to get serial, so it should be inited in romstage. On X201 there is nothing useful that early in boot but it's needed to init more to get dock working, in particular EC init needs to be done first. Change-Id: If5072e3dec883a94cd2d5643a92f7f6c3c9feee9 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4294 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-12-02EC H8: remove dependence on IS_X201Vladimir Serbinenko
Instead define brightness up/down function and gfx device and use preprocessor magic to glue it together. Change-Id: I03074ae07b33c1546d229efc3e80606ddbee6300 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4282 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martin.roth@se-eng.com>
2013-12-02global: Fix usage of get_option() to make use of CB_CMOS_ codesAlexandru Gagniuc
Do not directly check the return value of get_option, but instead compare the returned value against a CB_CMOS_ error code, or against CB_SUCCESS. Change-Id: I2fa7761d13ebb5e9b4606076991a43f18ae370ad Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4266 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-12-02ec/lenovo/h8: Add h8_build_id_and_function_spec_version()Peter Stuge
The function reads the Build ID and the supported function specification version from the running EC firmware, and stores a text representation in the provided output buffer. Change-Id: I3b647d7f315c9b4922fa9a9c5167a80f6d82e753 Signed-off-by: Peter Stuge <peter@stuge.se> Reviewed-on: http://review.coreboot.org/3617 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-12-01H8: Move EC GPE declaration to mainboardVladimir Serbinenko
Change-Id: Iefc481f09268dd15bbc3cbfa8bdd110d44383f6a Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4281 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martin.roth@se-eng.com> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-11-25Add declaration of dock registers 1, 2 and 3.Vladimir Serbinenko
Needed to make dock work on X201. Change-Id: Id0b32266cacf04bb48530bedf50818c268f947ec Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4081 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2013-11-24Lenovo hotkeys supportVladimir Serbinenko
Implement proprietary lenovo ACPI hotkeys Change-Id: I36a6d3a280b0ac76d9ea063cdc10197a57e306f9 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4055 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-23Change EC GPE on X201Vladimir Serbinenko
X201 has GPE at 0x11 (17) instead of 28. Tested on X201. Change-Id: Ib6306e6f085c4f6811df0789aa402a0d6901ed13 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4053 Reviewed-by: Idwer Vollering <vidwer@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-11-23Call X201 dock hooks in EC codeVladimir Serbinenko
Unlike on X60/T60 dock has to be inited at the same time as EC. Change-Id: If6eb3140c871859ce99027a50908f72bcc560243 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4082 Reviewed-by: Idwer Vollering <vidwer@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-29ec/kontron/it8516e: Add sanity checks for values from nvramNico Huber
Change-Id: Ie52d80fc8657064efdcec51c31dc9309fcc28121 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/3787 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-07-29ec/kontron/it8516e: Comment low-level EC functionsNico Huber
Change-Id: I5f75998356554e08f8c9920e7612494e4710ab15 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/3786 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-07-29ec/kontron/it8516e: Remove some unsafe bit shiftingNico Huber
The EC expects the temperature in 64ths degree C. Alter it8516e_set_fan_temperature() to just export this interface and make the calculation more obvious. Change-Id: Ibe241b7909f4c02b30b1e1200a1850d47695a765 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/3785 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-29ec/kontron/it8516e: Add PWM limits optionNico Huber
Add an option to set minimal and maximal PWM percentages when the fan is in temperature controlled mode. Also fix a non-ascii flaw. Change-Id: I85ae244bee2145bf17d6c29e93dd4871540985c8 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/3774 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-07-29ec/kontron/it8516e: Correct fan setting for PWM modeNico Huber
The EC firmware expects a 255th while we provide a percentage. Change-Id: Ib06a061b431ac728329043179800729e39e6166b Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/3773 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-07-29ec/kontron/it8516e: Add option for external temperature sensorNico Huber
The IT8516E firmware of Kontron supports some selected external sensors attached to the EC via SMBUS or GPIO16. Change-Id: I4c451c360a393e916430e3bea04a95847455cef7 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/3772 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-07-10chromeec: Add a function to send passthrough i2c messages.Gabe Black
Change-Id: I576d0dbf65693f40d7d1c20d3d5e7a75b8e14dc9 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: http://review.coreboot.org/3752 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-10ec/google: Support ChromeOS EC on SPI bus.Hung-Te Lin
For devices with ChromeOS EC on SPI bus, use the standard SPI driver interface (see spi-generic.h) to exchange data. Note: Only EC protocol v3 is supported for SPI bus. Change-Id: Ia8dcdecd125a2bd7424d0c7560e046b6d6988a03 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/3751 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-10ec/google: Support Chrome EC protocol version 3.Hung-Te Lin
Add the new Chrome EC protocol version 3 to Coreboot. Note, protocol version 3 is not applied on any bus implementations yet. LPC (x86) and I2C (arm/snow) are still using v2 protocol. The first one to use v3 protocol will be SPI bus (arm/pit). LPC / I2C will be updated to v3 only when they are ready to change. Change-Id: I3006435295fb509c6351afbb97de0fcedcb1d8c4 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/3750 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-10ec/google: Generalize communication protocol support in EC drivers.Hung-Te Lin
Since EC protocol v3, the packet format will be the same for all buses (inclding I2C, SPI, and LPC). That will simplify the implementation in each individual bus driver source file. To prepare for that, we will move the protocol part into crosec_proto.c: crosec_command_proto, with bus driver in callback "crosec_io". Change-Id: I9ccd19a57a182899dd1ef1cd90598679c1546295 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/3749 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-10ec/chromeec: Merge upstream V3 structure and constant definition.Hung-Te Lin
Chrome EC protocol V3 has several new command structure and constants defined. Simply cherry-picking changes from upstream. Change-Id: I7cb61d3b632ff32743e4fa312e0cc691c1c4c663 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/3748 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-10ec: Reserve correct ioport regions for Chrome OS EC to useBill Richardson
The LPC-based ChromeOS EC uses several ioport regions to communicate with the AP. In order for the new unified userspace access method to work, we need them to be reserved by the BIOS. Before /proc/ioports shows: 0800-0803 0804-08ff We'd like just a single 256-byte region at 0x800, but ASL can't handle that. So this will work: 0800-087f 0880-08ff Change-Id: I3f8060bff32d3a49f1488b26830ae26b83dab79d Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: http://review.coreboot.org/3746 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-10slippy/falco/peppy: Enable SERIRQ continuous modeDuncan Laurie
The Chrome EC still does not tolerate SERIRQ in quiet mode and so the keyboard does not work properly. Change-Id: I9ab052187c9926ce0e2c86b86dfe987dd6564c1b Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/3745 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-10ec: Add romstage function for checking and rebooting ECDuncan Laurie
Now that we are executing VbInit() in coreboot we can end up in a situation where the recovery reason is consumed during VbInit (end of romstage) and then the EC is rebooted to RO during ramstage EC init, thereby losing the recovery reason. Two possiblities are to remove the EC check+reboot from ramstage and let it happen in depthcharge. This however means that the system has to boot all the way into depthcharge and then reboot the EC and the system again. Instead if we do a check in romstage before VbInit() is called then we can reboot the EC into RO early and avoid booting all the way to depthcharge first. This change adds a ramstage version the EC init function and calls it from the shared romstage code immediately after the PCH decode windows are setup. Change-Id: I30d2a0c7131b8e4ec30c63eea36944ec111a8fba Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/3744 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-10chrome ec: Update EC header from EC repositoryDuncan Laurie
- Updated ec_commands.h is copied in directly from EC repo - Removed "old" interface and update resources for "new" interface - Updated temp sensor constants and added "not calibrated" - Update mainboards to remove check for EC_SWITCH_KEYBOARD_RECOVERY Change-Id: Ic93c1914f86b6f5bc224178270624ed92b5c1e15 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/3743 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-10ec: Remove hardcoded GPI offset in EC SCIDuncan Laurie
With LynxPoint-LP the SCI GPE is no longer a GPIO that is offset by 16. Remove the Add and fix up the link definition so it is still accurate. Change-Id: I091141183a09345b5ffe28365583e48019f9f5e5 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/3742 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-10ec: Fix spellingMartin Roth
Change-Id: I5e4d35572c43f07bec5ec0bcd75c717723228e2f Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/3757 Reviewed-by: Dave Frodin <dave.frodin@se-eng.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-10ChromeEC: Fix the default, depends for EC_GOOGLE_CHROMEEC_I2C.Gabe Black
The default for this variable should be n, it should only depend on EC_GOOGLE_CHROMEEC, and it should be (and is) explicitly enabled when needed. This prevents it from being turned on when the EC bus is SPI. Change-Id: Idc6651a764be4f055341a36b9b4a58990f050b0c Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3737 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-08Revert "Radio and dock support in EC on X60 and X201"Peter Stuge
This reverts commit 7d1ebbff5ad224591a2d1972737611f96a13145c Change-Id: I4a9d0cd31a3df3d1e092193953f334697ca65167 Signed-off-by: Peter Stuge <peter@stuge.se> Reviewed-on: http://review.coreboot.org/3616 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-06-17pnp: Unify some alignment to ease autogenerating patchesNico Huber
Most PnP drivers align the initialization of their `device_operations` with spaces. Unify this, so next autogenerated patches always match the alignment. Change-Id: I3f6baef6c8bb294c136354754125ea88c07a61a1 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: http://review.coreboot.org/3479 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-06-12Avoid tripping overheat alarm on X201 before ME bootsVladimir Serbinenko
Until ME boots (which takes seconds on X201) the reported temperature is 128 °C which triggers Linux overheat alarm which shuts down. Pretend temperature is 40°C until ME boots. Change-Id: Ia49fa03c6eb27f539a23711f2c8ebfde72b1dc18 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/3404 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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