| Age | Commit message (Expand) | Author |
|---|---|---|
| 2020-07-26 | src/include: Add missing includes | Elyes HAOUAS |
| 2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
| 2020-05-06 | treewide: replace GPLv2 long form headers with SPDX header | Patrick Georgi |
| 2020-05-06 | treewide: Move "is part of the coreboot project" line in its own comment | Patrick Georgi |
| 2020-03-17 | src (minus soc and mainboard): Remove copyright notices | Patrick Georgi |
| 2018-10-11 | src: Move common IA-32 MSRs to <cpu/x86/msr.h> | Elyes HAOUAS |
| 2017-03-13 | src/include: Wrap lines at 80 columns | Lee Leahy |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2011-08-04 | cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs. | Keith Hui |
 |
index : coreboot | |
| Some coreboot project code with my work | vimacs |
| summaryrefslogtreecommitdiff |