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coreboot
2560p
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autoport-hsw
broadwell_refcode
e6230
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haswell-mrc
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hp9480m
mec1322
Some coreboot project code with my work
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cache.h
Age
Commit message (
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Author
2016-07-31
src/include: Capitalize CPU, RAM and ROM
Elyes HAOUAS
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2014-01-28
x86: add common definitions for control registers
Aaron Durbin
2012-04-25
Replace cache control magic numbers with symbols
Patrick Georgi
2011-11-01
remove trailing whitespace
Stefan Reinauer
2010-09-17
AMD Fam10 code breaks with gcc 4.5.0.
Scott Duplichan
2010-05-19
cosmetic comment changes.
Stefan Reinauer
2010-05-16
Sorry for this for second time. Now compile tested for both cases ;)
Rudolf Marek
2010-05-16
Sorry for this. I fixed that reverting the change for ROMCC.
Rudolf Marek
2010-05-16
Following patch reworks car_disable into C. Tested, works here. I compared
Rudolf Marek
2010-04-27
Since some people disapprove of white space cleanups mixed in regular commits
Stefan Reinauer
2010-04-06
No warnings day, next round.
Stefan Reinauer
2010-03-28
drop unneeded __ROMCC__ checks when the check for __PRE_RAM__ is more
Stefan Reinauer
2009-11-06
Split the two usages of __ROMCC__:
Myles Watson
2005-07-06
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51
arch import user (historical)
2004-10-14
- Renamed cpu header files
Eric Biederman