coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2019-12-19	Drop ROMCC code and header guards	Arthur Heymans
2019-11-03	cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATE	Kyösti Mälkki
2019-07-07	cpu/x86: Fix MSR_PLATFORM_INFO definition	Kyösti Mälkki
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2018-06-14	nb/intel/fsp_rangeley: Use MSR_PLATFORM_INFO instead of 0xce	Elyes HAOUAS
2017-07-13	src/include: add IS_ENABLED() around Kconfig symbol references	Martin Roth
2017-03-09	src/include: Fix unsigned warnings	Lee Leahy
2016-09-05	src/include: Improve code formatting	Elyes HAOUAS
2015-08-31	timestamp: add tick frequency to exported table	Aaron Durbin
2015-01-05	timestamps: Switch from tsc_t to uint64_t	Stefan Reinauer
2014-01-28	x86: include header to define types in use	Aaron Durbin
2013-05-25	Intel GM45, 945, SNB: Move `multiply_to_tsc()` to `tsc.h`	Ronald G. Minnich
2013-05-07	x86: add TSC_CONSTANT_RATE option	Aaron Durbin
2012-08-09	Synchronize rdtsc instructions	Stefan Reinauer
2010-03-28	drop unneeded __ROMCC__ checks when the check for __PRE_RAM__ is more	Stefan Reinauer
2010-03-17	fix a couple of warnings	Stefan Reinauer
2010-02-22	This is a general cleanup patch	Stefan Reinauer
2009-11-06	Split the two usages of __ROMCC__:	Myles Watson
2009-10-27	Add few missing prototypes, and remove few unused (thus lonelly) variables.	Maciej Pijanka
2006-03-13	correct __ROMCC__	Li-Ta Lo
2004-10-14	- Renamed cpu header files	Eric Biederman